News from October 2026

Open-weight models, China-US tensions, Taiwan – just a few of the more than dozen references to China-related risks cited in Anthropic’s much-anticipated listing prospectus, which was finally released on Monday after months of speculation.

Mostly concentrated within the 93-page “risk factors” section of the filing with the US Securities and Exchange Commission, the disclosures reveal how the Silicon Valley start-up assesses the commercial threats posed by China and its artificial intelligence...

Veteran Semiconductor Leader Brings More Than 20 Years of Operational Excellence, Strategic Growth, and Industry Leadership DALLAS, Oct. 27, 2026 /PRNewswire/ -- Advanced Process Solutions (APS), an industry leader in high precision and high purity manufacturing and process technology...

Inductor-inductor-capacitor (LLC) applications that don’t require a closed control loop can benefit from simple and low-cost implementations. The post Power Tips #158: Using a programmable logic device as an LLC controller appeared first on EDN.

Applied Materials has announced it will increase its stake in Besi to approximately 20 percent.

Grab the 9800X3D with a matching Gigabyte motherboard, 32GB of DDR5 RAM, and a 2TB SSD, all for just $1,180.99, giving you a $358.98 discount that makes the equivalent RAM price just $151.

Microsoft has begun testing the option to enable Intel's Advanced Performance Extensions, or APX, which will bring a performance boost to some apps — although no chips with APX support are available as yet.

Infineon Technologies AG of Munich, Germany is establishing the world’s first high-volume manufacturing facility for gallium nitride (GaN) power semiconductors on 300mm wafers in Europe. As part of the project, the firm will invest about €1.1bn in its existing cleanroom facilities at the site in Villach, Austria by 2034.

Leveraging both the existing and upgraded infrastructure will enable efficient and cost-effective expansion of manufacturing capacity, it is reckoned. Production is scheduled t…

Global Electronics Association East Asia Awards Recognize Contributions to Standards Development and Adoption 431279_sandyge… Oct 27, 2026 Oct 27, 2026 Global Electronics Association East Asia recognizes the companies and industry professionals advancing electronics manufacturing and industry standards through the East Asia Awards.

This year’s honorees demonstrate a commitment to implementing international standards, strengthening manufacturing capabilities, and contributing technical expertise…

Direct dielectric cooling brings insulating liquid closer to SiC/GaN devices, shortening thermal paths but complicating insulation design. The post Direct Dielectric Cooling for Power Converters appeared first on Power Electronics News.

Semianalysis identifies ASML as the biggest threat to Besi’s largest growth market, hybrid bonding. Most strikingly, the Duiven-based company felt compelled to respond to the analysis with a statement about its alleged competitor.

Microsoft is offering buyouts to around 60,000 members of its workforce as it looks to balance the books amid a ramp-up in AI data center spending.

Nvidia is committing billions to expand substrate, co-packaged optics, advanced packaging, and chip-testing capacity through 2028, reserving capacity at nearly every stage of its AI accelerator supply chain.

AI agents are all the rage, and the technology is being integrated into embedded development environments to boost productivity. AI can be used for code generation and configuration of platforms, and even for the design of hardware in FPGAs, but there are issues with the quality and the safety of code that is produced.

“Natural […] The post AI agents for embedded design appeared first on eeNews Europe.

AI political groups are spending millions in the 2026 election as Silicon Valley factions battle over regulation, safeguards and state authority.

Context: M22, joined one of the big players in AI hardware about 4 months back. First job right after bachelors.

I studied traditional CPU architecture during college and knew nothing about AI accelerators. During these 4 months, I have been working mainly on roofline modelling and performance analysis, nothing related to deep microarch yet.

I feel i have developed some intuition about how performance modelling works and how to analyse workloads, bottlenecks at the system level, and how LLMs be…

SpaceX expects fourth-quarter capital expenditure of $35 billion to $40 billion, CFO Bret Johnsen said, as Elon Musk pushes to expand the company’s AI computing infrastructure.

Data center gear is being stolen in transit to the tune of hundreds of millions — grand-theft-GPU thieves hack accounts, perform hit-and-runs, and spoof GPS signals

Anthropic has filed to go public as it pursues a potential multitrillion-dollar valuation, reporting $16.3 billion in revenue for the first half of 2026. The company’s filing also warns that its AI safety measures may not prevent catastrophic risks.

OpenAI and AI chipmaker Cerebras have also pursued public-market listings

Infineon Technologies, NVIDIA, Microsoft and UnternehmerTUM Accelerator have launched the Physical AI Growth Lab, an equity-free accelerator aimed at helping robotics and industrial AI startups move from prototypes to commercial deployment.

The programme will run from January to April 2027, selecting 10 to 15 startups for technical support, mentoring and access to industry partners. For […] The post Infineon, NVIDIA and Microsoft back European physical AI startups appeared first on eeNews Europ…

Volkswagen Group has expanded its partnership with NXP Semiconductors, selecting the chipmaker’s S32K5 microcontrollers (MCUs) as a core component of its next-generation software-defined vehicle (SDV) architecture. The first vehicle using the new architecture is scheduled for 2027.

The agreement, announced ahead of the International Suppliers Fair (IZB) in Wolfsburg, Germany, strengthens Volkswagen’s strategy of working […] The post Volkswagen Group and NXP team up on next-generation vehicle ch…

Taipei, Oct. 27 (CNA) Taiwan shares closed slightly higher Tuesday after a seesaw trading session, as contract chipmaker Taiwan Semiconductor Manufacturing Co. (TSMC) rebounded from earlier weakness to lift the broader market into positive territory, dealers said.

Quantum computing’s future depends on measuring useful processing power against energy consumption and cost, not just qubit counts. The post Quantum Computing’s Energy Bill Is Coming, and We Haven’t Priced It In appeared first on EE Times.

Infineon Technologies is investing around €1.1 billion in its Villach facility in Austria to establish what it says will be the world’s first high-volume manufacturing plant for gallium nitride (GaN) power semiconductors on 300mm wafers. Production is expected to begin by the end of 2027, with investment continuing through 2034.

The move marks a significant […] The post Infineon invests €1.1bn in Europe’s 300mm GaN chip production appeared first on eeNews Europe.

Meta on Monday announced plans to raise a total of $95 billion to support its investments in artificial intelligence infrastructure.

3D DRAM-on-GPU thermal design; multi-tier CFET self-heating and parasitics; 200G/λ silicon photonics; dry-deposited EUV and e-beam resists; neural-network-based SPICE modeling for 3nm; security-aware 3D CiM mapping; Pt-W absorbers for high-NA EUV masks.

The post Chip Industry Technical Paper Roundup: Oct. 27 appeared first on Semiconductor Engineering.

Anglia Components has signed a Pan-European franchise agreement with NOVOSENSE Microelectronics, the Chinese manufacturer of analogue and mixed signal ICs. Explains John Bowman, Anglia’s Marketing Director: “This agreement is part […] The post Anglia signs Novosense appeared first on Electronics Weekly.

Intel is to buy Classiq, a provider of quantum computing software. The combination of Classiq’s synthesis platform with Intel’s spin-qubit manufacturing and existing software would create a user-friendly full-stack quantum […] The post Intel buys Classiq to become full-stack quantum computing provider appeared first on Electronics Weekly.

NVIDIA and Meta today announced they will partner to expand their work on Muse and the Muse family of models to improve inference and training performance, reflecting popular demand for useful AI agents.

Taipei, Oct. 27 (CNA) Former Intel CEO Pat Gelsinger said Tuesday that although AI investment could face periods of disruption and market correction, he does not believe the sector is experiencing a bubble.

Is any one from the embedded field here especially from the post silicon validation. Need some guidance/help!

Thanks. submitted by /u/ganni1310 [link] [comments]

Hey all, do you know when Intel starts sending out interviews for their Silicon Internships. Context: I talked to a few engineers on campus tabling, had a great conversation they asked a technical question and they said I was the first to solve it and they would note down my name.

This was about one month ago haven’t seen anything. submitted by /u/Hairy-Store-8489 [link] [comments]

The pervasive deployment of Deep Neural Networks (DNNs) across the computing spectrum has brought growing attention to energy efficiency, alongside raw performance.

While voltage scaling is a potent knob for power reduction, its application in next-generation nodes is hampered by severe throughput degradation and susceptibility to process variation. This work aims to address these energy-reliability trade-offs by introducing a hardware-software co-design methodology, based on the observation th…

The key-value (KV) cache places growing demands on GPU memory capacity and bandwidth as large language models serve longer contexts and more concurrent requests. Its footprint limits concurrency, while repeated KV reads during attention can make decoding memory-bandwidth bound.

Prior lossless KV cache compression methods reduce transfers between devices but restore the uncompressed KV cache in GPU memory before attention. They therefore leave these repeated KV reads unchanged and require additi…

Routing has become a major bottleneck in large-scale FPGA design flows, where traditional routers rely on sequential net-by-net processing and rip-up-reroute heuristics. This inherent sequentialism limits parallelism, leads to suboptimal utilization of routing resources, and significantly increases runtime on modern FPGAs.

This paper introduces DiffRouter, the first differentiable, gradient-based FPGA routing framework with GPU acceleration. By lifting routing into a continuous optimization spa…

Inductor- and transformer-coupled balanced mixers are usually analyzed with switching approximations, conversion matrices, harmonic balance, or circuit simulation.

This paper instead derives their loaded quasistatic equations from the device laws, keeping the transformer ratios, reflected load, bias, and the connections that set the IF common mode. The functions needed to solve these equations are surprisingly varied.

A Shockley single-balanced pair is solved by the principal Lambert function $…

Heterogeneous systems-on-chip (SoCs) increasingly rely on domain-specific hardware accelerators (HAs) to deliver performance and energy efficiency gains beyond what general-purpose processors can provide.

However, operating systems (O/S), such as Linux, assume that processors are the Compute Elements (CEs) and HAs are peripheral devices rather than specialized CEs. As a result, HA execution incurs substantial software (SW) overheads that reduce the effective benefits of hardware (HW) accelerati…

AI training and inference workloads make GPU power swing repeatedly between compute and communication phases. As a result, the cascaded converters in a datacenter rack keep moving between operating points with different efficiencies.

This paper uses an energy based, cycle averaged method to quantify that effect along a 240 V AC to 400 V DC to 51 V DC rack power path, using measured efficiency curves of commercially available GaN based PFC and LLC converters. For a 1 Hz, 50% duty-cycle load swin…

Hysteresis edge tracking, the final stage of Canny edge detection, follows edge chains of unbounded length and therefore resists single-pass streaming; FPGA designs either approximate it or dedicate separate labelling hardware to it.

We show that a single library of hardwired 3x3 operators, each with an identical two-clock latency, delivers both a camera-rate approximation and exact hysteresis on a low-cost Artix-7 (XC7A35T). The fast path streams camera pixels through the operators and K local…

Chip placement strongly affects routed wirelength and thermal behavior, yet these downstream metrics are difficult to evaluate during macro placement. Learning-based macro placers commonly optimize the macro-only half-perimeter wirelength (HPWL), denoted mHPWL, which ignores standard cell connectivity and spatial demand.

In contrast, analytical mixed-size placers optimize differentiable full netlist wirelength and density objectives but are typically unaware of thermal effects. We propose EGGPl…

Analog circuit design still relies heavily on expert knowledge, and porting proven designs to new process nodes is a recurring bottleneck. As a lower supply reduces available voltage headroom, a working topology may require redesign or fail to meet specifications.

While large language models (LLMs) have begun to generate and optimize analog circuits, existing benchmarks focus on one process node and assume feasible specifications. To bridge this gap, we introduce AnalogPortBench, a benchmark of…

Key-value (KV) cache capacity and memory traffic are primary bottlenecks in long-context autoregressive inference.

We evaluate five cache paths on an Apple Silicon M5 Max using MLX: a native bf16 baseline, block-scaled E2M1 FP4, a Python reference implementing radial quantization with a QJL-style residual, sequential FP4-to-Polar composition, and a fused Metal Polar kernel.

On Apple Silicon M5 Max, fused Metal PolarQuant achieves 46.8 tok/s at 3,456 B/token - 3.64x compression versus the bf16 b…

Hi, Can anyone share some info about renesas india, like work culture, layoffs, annual compensation (average). I have got an offer from renesas hyderabad, hence asking.

I am currently at TI. submitted by /u/hardoi_ [link] [comments]

Hi everyone, I graduated with a degree in Electronics Engineering (ECE) from a university in the Philippines last year. Immediately after graduation, I accepted a research role at my university.

For the past year, I have been working as a Project Technical Assistant IV. My role primarily involves 3D modeling, basic PCB design, technical paper writing, and presenting our work at tech expos.

While I appreciate the research experience, my true passion is Chip Design (IC Design). However, as a begi…

It's more important than chips, 'leccy and the net, after all

This is a good book for someone looking to enter the field. Written by a practicing engineer.

I have a copy (pretty cheap!). What stood out to me was the clear and concise prose, rich in details that only a process engineer would know.

Without giving away too much, there is a surprising amount of nuance and technical detail for a book < 100 pages! It looks like the diagrams are hand drawn (not the usual AI crud).

The author seems to be a major contributor to the Nanofab Wiki (https://wiki.nanof…

submitted by /u/PensionImpossible662 [link] [comments]

If someone who is working in the semiconductor field would share their experience. I would be grateful. submitted by /u/Objective-Custard401 [link] [comments]

Hi everyone! I recently received an interview invitation for the Mechanical Engineer – New College Grad (BS/MS) role at Applied Materials Has anyone interviewed for this or a similar role?

What technical questions were asked? Were they focused on mechanical design, GD&T, heat transfer, materials, FEA, or general engineering fundamentals?

Any insights or preparation tips would be greatly appreciated. Thanks!

(I have a background in mechanical engineering and materials science, along with industr…

I get the "AI data center" think and using more but there is no shortage, so the prices are high just because companies do not need us and are ripping us off? This is what a buddy told me lol Same things with Graphic cards?

Will CPU's go up soon? submitted by /u/palepatriot76 [link] [comments]

submitted by /u/imaginary_num6er [link] [comments]