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News bannerTSH-AD-NEWS-01AGrab this slot: early bird pricingAdvertise on The Semiconductor HubFull-width banner · 1 adShowing news in every market
412 articles, the latest 30 shown here
4 new in the last hour · 5 the hour before (-1)
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Design & IP
Summary with sourceApple takes powerful M6 chip to the MacBook Pro, iMac
6th-gen M-series silicon promises more cores, faster memory, a fatter NPU, and better connectivity, now in more form factors
Markets & Policy
Summary with sourceBig Red gets cozy with Google to offer TPUs to AI customers
Oracle plans to add those chips alongside new Nvidia hardware and OpenAI services as businesses await AI payoffs
Markets & Policy
Summary with sourceIntroducing VMware solution on Google Cloud
Many organizations with workloads on VMware are looking for ways to expedite their data center exits, migrate and modernize their mission-critical workloads, or simply leverage the cloud as a secondar…
Design & IP
Summary with sourceAnalog Superposition Increases Effective PCM Storage Density (IBM Research Europe)
Researchers at IBM Research Europe published “Superposed analog memory for vector storage in neural networks.” Summary: Researchers demonstrated an analog phase-change memory architecture that stores…
Design & IP
Summary with sourceAMD Expands AI and Cloud Infrastructure Collaboration with Oracle
6th Gen AMD EPYC processors will power OCI Compute E7 instances, while AMD Pensando technology provides the foundation for Oracle Acceleron converged NICs for AMD compute and accelerator instances on…
Powering the agentic enterprise with latest innovations in Oracle AI Database@Google CloudMarkets & Policy · Google Cloud pricing (GPU / TPU) · Summary
Image: Google Cloud pricing (GPU / TPU) (opens in a new tab) For decades, core enterprise operations — from global supply chains and financial ledgers to billing engines — have relied on the performance and transactional integrity of Oracle databases.
Today at Oracle AI World in Las Vegas, Google Cloud and Oracle are expanding our partnership across the AI stack — spanning AI compute and infrastructure (including making Google TPUs available through Oracle Cloud Infrastructure), enterprise data, and agentic AI — by deepening the integration between Oracl…
Generally Available: Cost management and tagging for Claude models in Microsoft FoundryFoundry & Manufacturing · Microsoft Azure pricing · Summary
Microsoft Foundry now brings Claude models into Azure Cost Management alongside the rest of your Foundry spend, generally available. Until now, Claude charges appeared under SaaS rather than under the Foundry resource used to deploy them, and Claude deplo
Apple: HWT Cellular Technology InternEDA & Tools · r/chipdesign · Summary
I am a masters computer engineering student. Apple reached out to me for an interview for the role of HWT Cellular Technology intern.
Does anyone know what kind of role this is? I don't remember applying for any such roles.
I mainly applied for Design and Verification roles only. But this particular role at Apple wasn't specific, it had all kinds of roles like Design, Verification, SW/GPU etc you name it.
Is the interview more to get to know me and my interests? It seems like I have to do the i…
Military drone outfit Anduril partners with Qualcomm to build laptops on US soil with new BlueChip ventureMarkets & Policy · Tom's Hardware · Summary
Image: Tom's Hardware (opens in a new tab) The defense contractor aims to fully bring back laptop manufacturing on U.S. shores, with its first BlueChip laptop prototypes having 90% procurement cost coming from suppliers in the U.S. and other allied countries.
6A POL Power Module Delivers Precision and Protection Without External PassivesMarkets & Policy · Electronic Design · Summary
Image: Electronic Design (opens in a new tab) Microchip's latest 6A POL converter comes with power MOSFETs, PWM controller, inductors, and capacitors.
ChipAgents Expands AI Across Chip Design. The Test Is Faster, Verified ResultsEDA & Tools · SemiWiki Forums · Summary
Image: SemiWiki Forums (opens in a new tab) ChipAgents is expanding its agentic AI platform across digital and analog semiconductor engineering, aiming to connect fragmented design workflows through a common system that can plan tasks, operate engineering tools and evaluate results.
The Santa Clara company says its IC-Star engine combines organizational design … Read More The post ChipAgents Expands AI Across Chip Design. The Test Is Faster, Verified Results appeared first on SemiWiki.
Bringing Google TPUs to Oracle Cloud InfrastructureMarkets & Policy · Google Cloud pricing (GPU / TPU) · Summary
Image: Google Cloud pricing (GPU / TPU) (opens in a new tab) As AI workloads scale across every industry, organizations need compute options that optimize throughput, latency, and unit economics across the AI lifecycle.
To meet this demand, Oracle and Google Cloud are partnering to bring Google Tensor Processing Units (TPUs) to Oracle Cloud Infrastructure (OCI), making OCI the first hyperscaler outside Google to offer TPUs. Together, we will deploy TPU capacity on OCI starting in the calendar year 2027.
TPUs: Co-designed from silicon to software Google b…
Sanjay Mehrotra, Chairman and CEO at Micron Technology to Receive Global Semiconductor Alliance’s Highest Honor, the Dr. Morris Chang Exemplary Leadership AwardMarkets & Policy · GSA (Global Semiconductor Alliance) · Summary
Image: GSA (Global Semiconductor Alliance) (opens in a new tab) SAN JOSE, Calif. (Oct. 27, 2026) – Global Semiconductor Alliance (GSA) proudly announces it will honor Sanjay Mehrotra, Chairman and CEO at Micron Technology with its prestigious Dr. Morris Chang Exemplary Leadership Award at this year’s Annual Awards Celebration on Dec. 10, 2026.
Established in 1999, the Dr. Morris Chang Exemplary Leadership Award stands as Read More.. The post Sanjay Mehrotra, Chairman and CEO at Micron Technology to Receive Global Semiconductor Alliance’s Highest Honor, the …
HRT Design Verification Engineer Phone ScreenEDA & Tools · r/chipdesign · Summary
Hi everyone! I recently got an interview opportunity with Hudson River Trading (HRT) for a Design Verification Engineer role, and I have an upcoming technical phone screening with a member of their DV team.
I have an M.S. in Electrical Engineering, with a focus on computer architecture and digital design. I wanted to ask those who have interviewed with HRT or work in hardware verification/trading firms: What does the technical phone screening typically look like?
What topics should I prioritize…
NVIDIA and Oracle Expand NVIDIA Vera Rubin to Multi-Gigawatt Scale and Bring NVIDIA Vera CPU to Oracle Cloud InfrastructureDesign & IP · NVIDIA · Summary
Image: NVIDIA (opens in a new tab) NVIDIA and Oracle today announced plans to expand Oracle Cloud Infrastructure (OCI) Superclusters with NVIDIA Vera Rubin NVL72 systems to multi-gigawatt scale, supporting growing customer demand for AI training, inference and agentic applications.
Gemini Robotics Embodied Reasoning 2 is now available on Google CloudMarkets & Policy · Google Cloud pricing (GPU / TPU) · Summary
Image: Google Cloud pricing (GPU / TPU) (opens in a new tab) Earlier this year, we introduced Gemini Robotics 2 — our next-generation intelligence layer enabling robots to think, act, and adapt in the physical world. At the core of this breakthrough is Gemini Robotics Embodied Reasoning 2 (ER 2), a specialized Gemini model that serves as a robot’s high-level brain.
Working across any robot embodiment — from stationary arms to full humanoids — Gemini Robotics ER 2 combines advanced spatial and temporal video understanding with long-horizon planning and bu…
Why Synopsys’ Role in AMD’s Instinct MI455X Matters for AI InfrastructureEDA & Tools · SemiWiki Forums · Summary
Image: SemiWiki Forums (opens in a new tab) Synopsys’ collaboration with AMD on the Instinct MI455X GPU highlights a shift in how advanced AI processors are developed. Increasing performance depends on coordinating compute dies, memory interfaces, packaging, power delivery, and software.
According to Synopsys’ announcement, AMD used its design, verification, … Read More The post Why Synopsys’ Role in AMD’s Instinct MI455X Matters for AI Infrastructure appeared first on SemiWiki.
X-capacitor discharge IC for stringent standby, no-load requirementsMarkets & Policy · Electronics Weekly · Summary
Image: Electronics Weekly (opens in a new tab) Power Integrations is expanding its CAPZero family of X-capacitor discharge ICs with the fourth-gen CAPZero-4 device, for industrial and consumer applications. The latest member of the CAPZero family reduces system […] The post X-capacitor discharge IC for stringent standby, no-load requirements appeared first on Electronics Weekly.
The imec Report: Scaling Optical Interconnects For The AI EraMarkets & Policy · Semiconductor Engineering · Summary
Image: Semiconductor Engineering (opens in a new tab) Unprecedented demand for bandwidth calls for bringing optics closer to silicon through a fundamental rethinking of the optical interconnect roadmap. The post The imec Report: Scaling Optical Interconnects For The AI Era appeared first on Semiconductor Engineering.
From Wafers to Panels: Overcoming Lithography Challenges in Advanced PackagingEquipment & Materials · Semiconductor Digest · Summary
Image: Semiconductor Digest (opens in a new tab) Unlike front-end lithography, packaging lithography typically works at feature sizes around 1 µm, so overlay accuracy, throughput and thermal stability matter more than ever-smaller CDs, and those demands grow as substrates move from 300mm wafers to panels as large as 600 x 600mm.
The post From Wafers to Panels: Overcoming Lithography Challenges in Advanced Packaging appeared first on Semiconductor Digest.
Back-End Equipment: From Volume Assembly to a Strategic Advanced Packaging EcosystemPackaging & Test · Semiconductor Digest · Summary
Image: Semiconductor Digest (opens in a new tab) According to Yole Group’s Status of the Back-End Equipment Industry 2026 report, equipment revenue will grow from $8.1 billion in 2025 to $9.5 billion in 2026 and $10.6 billion in 2027. The post Back-End Equipment: From Volume Assembly to a Strategic Advanced Packaging Ecosystem appeared first on Semiconductor Digest.
Wafer Fab Equipment: A Booming Market Built on a Fragmenting Supply ChainFoundry & Manufacturing · Semiconductor Digest · Summary
Image: Semiconductor Digest (opens in a new tab) Wafer fab equipment revenue reached $129 billion in 2025 and is forecast to approach $220 billion by 2031, a 9% CAGR, according to Yole Group’s Status of the Wafer Fab Equipment Industry 2026 report. The post Wafer Fab Equipment: A Booming Market Built on a Fragmenting Supply Chain appeared first on Semiconductor Digest.
AMHS Is Not Just Factory LogisticsFoundry & Manufacturing · Semiconductor Digest · Summary
Image: Semiconductor Digest (opens in a new tab) Automated material handling systems are usually treated as the fab’s logistics layer, moving lots between tools as quickly as possible. Dr. Moh Kolbehdari of Socionext America argues that view is becoming incomplete, because every wafer carrier holds material with a continuously developing manufacturing history.
The post AMHS Is Not Just Factory Logistics appeared first on Semiconductor Digest.
Samsung Portable SSD P9 review: speedy USB4 in a slim, pricey packagePackaging & Test · Tom's Hardware · Summary
Image: Tom's Hardware (opens in a new tab) Samsung’s Portable SSD P9 is the new USB4 external drive to beat. It feels premium and performed very well in our testing.
But you’ll have to pay a lot for it, or any similarly performing drive, these days.
TSMC reportedly weighs 20% CoWoS price increase as Nvidia Blackwell and Rubin chips put pressure on packaging capacityPackaging & Test · Tom's Hardware · Summary
Image: Tom's Hardware (opens in a new tab) TSMC is reportedly weighing a price increase of up to 20% for its CoWoS advanced packaging technology as Nvidia’s Blackwell and upcoming Rubin chips intensify pressure on capacity.
Equipment deliveries now reportedly take up to eight months, while separate wafer-price increases of 5% to 10% are expected in 2027, with some customers potentially facing total cost increases of up to 25%.
Building More with Less: How to Navigate the Memory Chip ShortagePackaging & Test · Embedded.com · Summary
Every major AI buildout has multiple moving parts, but many operators are running into the same constraint. Demand for high-bandwidth memory (HBM) has outpaced what manufacturers can produce.
That supply crunch is now spilling over into the conventional dynamic random access memory (DRAM) chip that every server depends on, and the numbers show how tight [...] The post Building More with Less: How to Navigate the Memory Chip Shortage appeared first on Embedded.
Coverage by category
Published articles in each news category. Select a category to read it.
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| Item | Articles |
|---|---|
| Markets & Policy | 161 |
| Design & IP | 90 |
| Equipment & Materials | 51 |
| Packaging & Test | 47 |
| Foundry & Manufacturing | 38 |
| EDA & Tools | 25 |
Articles published each week
The last 12 weeks, by the week each article was published (weeks start on Monday).
- 10 Aug: 0
- 17 Aug: 0
- 24 Aug: 0
- 31 Aug: 0
- 7 Sep: 0
- 14 Sep: 0
- 21 Sep: 0
- 28 Sep: 2
- 5 Oct: 0
- 12 Oct: 0
- 19 Oct: 227
- 26 Oct: 183
Show this chart as a list
| Item | Articles |
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| 10 Aug | 0 |
| 17 Aug | 0 |
| 24 Aug | 0 |
| 31 Aug | 0 |
| 7 Sep | 0 |
| 14 Sep | 0 |
| 21 Sep | 0 |
| 28 Sep | 2 |
| 5 Oct | 0 |
| 12 Oct | 0 |
| 19 Oct | 227 |
| 26 Oct | 183 |
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