News from October 2026
665 stories of semiconductor news published on the Hub in October 2026, newest first and grouped by day (UTC). Each headline opens the story's page on the Hub, with a summary and a link to the original report.
Showing 51 to 100 of 665 stories.
Friday 30 October 202674 stories
How AI is Reshaping Semiconductor Design and ManufacturingMarkets & Policy · SemiWiki Forums · Summary

Image: SemiWiki Forums (opens in a new tab) While AI is transforming nearly every industry, some of its most significant advances are happening inside the semiconductor factories building the chips that power it. If you design AI systems, those manufacturing advances directly influence your performance, efficiency, and path to market.
The message from the recent Global… Read More The post How AI is Reshaping Semiconductor Design and Manufacturing appeared first on SemiWiki.
AI, fuelled by advanced chips, set to power semiconductor manufacturing: industry veteranDesign & IP · South China Morning Post - Tech · Summary
Artificial intelligence is no longer merely the driving force behind global semiconductor demand, but is also actively reinventing how chips are designed and built, industry leaders and scientists said at a major science forum in Shanghai on Friday.
Chen Yunji, co-founder of AI chipmaker Cambricon Technologies, predicted that the integration between AI and chip design would eventually automate the chip design process entirely. “In the [next] 10 years, the most important development … is the RSI…
SemiQ Launches 750 V and 1200 V Gen4 SiC MOSFETsEquipment & Materials · Power Electronics News · Summary
SemiQ’s 750 V and 1200 V Gen4 SiC MOSFETs combine lower on-resistance and switching energy for high-power conversion systems. The post SemiQ Launches 750 V and 1200 V Gen4 SiC MOSFETs appeared first on Power Electronics News.
Benchmarking Nvidia’s Vera CPU for the data center — standalone Vera tested against Granite Rapids-AP and EPYC TurinDesign & IP · Tom's Hardware · Summary

Image: Tom's Hardware (opens in a new tab) Nvidia gave us access to its Vera data center CPU for testing against Intel's Granite Rapids-AP and AMD's EPYC Turin.
Intel leaker reveals Moon Lake chip as a likely replacement for N-series SoCs — four lower-power-efficiency cores, no performance cores, and a 6W TDPDesign & IP · Tom's Hardware · Summary

Image: Tom's Hardware (opens in a new tab) An Intel leaker revealed Moon Lake chip as a likely replacement for N-series SoCs with four lower-power-efficiency cores, no performance cores, and a 6-watt TDP
5 years’ worth of salary in bonuses given to 700 eligible Micron workers as company continues to battle union — more than 4,300 production-line staff to receive three bonuses of more than $31,000, plus quarterly profit bonuses starting next yearMarkets & Policy · Tom's Hardware · Summary

Image: Tom's Hardware (opens in a new tab) Eligible employees get an annual performance bonus, a mass-production bonus, and a one-time appreciation bonus. A quarterly profit bonus has also been introduced starting January 2027.
Hon Hai unveils 3 new EV models at annual Tech DayMarkets & Policy · Focus Taiwan (CNA) · Summary

Image: Focus Taiwan (CNA) (opens in a new tab) Taipei, Oct. 30 (CNA) Taiwan-based manufacturing giant Hon Hai Precision Industry Co. introduced three new reference electric vehicle models at its annual Hon Hai Tech Day on Friday, showcasing its ambitions to claim a higher share in the global EV market through product diversification.
China dismisses US report of suspected spy targeting Nvidia CEO Jensen Huang as ‘groundless’Markets & Policy · South China Morning Post - Tech · Summary
China on Friday hit out at reported US intelligence allegations that a suspected Chinese spy had targeted Nvidia chief executive Jensen Huang, dismissing the claims as “groundless speculation” aimed at smearing Beijing.
“The relevant report is based on groundless speculation and [is] purely aimed at smearing and slandering China,” Chinese foreign ministry spokesman Guo Jiakun told a regular media briefing in Beijing. The pushback came after US outlet The New York Times reported on Thursday that…
Wide Bandgap Monthly Insights – October 2026Equipment & Materials · Power Electronics News · Summary
Here’s a RoundUp of this month’s must-read news about silicon carbide (SiC), gallium nitride (GaN), and Wide Bandgap Materials! The post Wide Bandgap Monthly Insights – October 2026 appeared first on Power Electronics News.
Google hit with criminal probe over unapproved AI data center deforestation — 816 acres of forest destroyed in Finland as wolves flee into local villages, facility threatens 40% power bill hikesMarkets & Policy · Tom's Hardware · Summary

Image: Tom's Hardware (opens in a new tab) A criminal investigation into the environmental damage caused by Google’s Finnish subsidiary has been launched.
Tech scare trade hits Nasdaq futures while crypto reels from its biggest-ever hackMarkets & Policy · CNBC Technology · Summary

Image: CNBC Technology (opens in a new tab) Amazon and Intel worsen the sell-off with disappointing earnings releases
Amid brutal sell-off, what comes next for Google, Amazon and other Big Tech titans?Markets & Policy · South China Morning Post - Tech · Summary
Soaring artificial intelligence revenues have failed to shield Intel, Amazon and Google’s parent company Alphabet from a brutal Wall Street sell-off, as their latest quarterly results deepened investor jitters over mounting capital spending and delayed returns.
Intel plunged about 23 per cent in extended trading on Thursday, while Amazon shed 7.3 per cent. Alphabet tumbled 12.6 per cent during the regular session in its worst day on record, dragging the Nasdaq Composite down 1.4 per cent and...
Deadly Intel Fab 28 explosion causes two-week shutdown, to cost $600 million and severely disrupt server chip manufacturing for six months — 10nm Xeon shipments stall during largest shortage in memoryFoundry & Manufacturing · Tom's Hardware · Summary

Image: Tom's Hardware (opens in a new tab) A two-week shutdown of Intel's Fab 28 in Israel will affect server CPU shipments for two consecutive quarters.
Amazon falls 7%, Intel plunges 25% in premarket trading, as pressure mounts after earningsMarkets & Policy · CNBC Technology · Summary

Image: CNBC Technology (opens in a new tab) Investors are nervous about the massive AI spending from the tech giants and whether that will pay off.
Wolfspeed launches transparent silicon carbide technology for AR and quantum computingEquipment & Materials · Semiconductor Today · Summary
Wolfspeed Inc of Durham, NC, USA — which makes silicon carbide (SiC) materials and power semiconductor devices — has announced the commercial introduction of its proprietary transparent silicon carbide (TSiC) technology, expanding the potential of SiC to enable next-generation augmented reality (AR), quantum computing and advanced optical applications...
Foxconn hopes to own 50% of the global AI server market within a couple yearsMarkets & Policy · CNBC Technology · Summary

Image: CNBC Technology (opens in a new tab) Foxconn's chairman told CNBC that AI demand remains strong as the company eyes U.S. expansion and a larger share of the global AI server market.
AWS installs an AI accelerator every 14 seconds and eyes $1 trillion annual revenueDesign & IP · The Register · Summary
Image: The Register (opens in a new tab) Before long, we could be writing about a cloud company with a retail side hustle
Energy-Efficient Memristor Accelerator for Depression Detection with a CNN-LSTM Hybrid ModelDesign & IP · arXiv cs.AR (Hardware Architecture) · Summary
Early screening of depression requires efficient analysis of audio and speech data, while conventional CPU and GPU platforms incur high latency and energy consumption for CNN-LSTM inference. To address this challenge, we propose a unified resistive RAM (ReRAM) processing-in-memory accelerator for a CNN-LSTM attention workload.
The architecture integrates convolutional, recurrent, attention, and multi-layer perceptron (MLP) stages within a crossbar-based framework, reducing intermediate data mov…
OPERA: OPamp Design by an Expert-Taught Reasoning Agent, from Specifications to LayoutEDA & Tools · arXiv cs.AR (Hardware Architecture) · Summary
Analog flows from specifications to a signed-off layout rarely run without manual iteration. Recent large language model (LLM) agents size circuits with optimizer loops over the device dimensions and stop at the schematic.
We present OPERA (OPamp design by an Expert-taught Reasoning Agent), in which a general-purpose LLM agent designs CMOS opamps from specifications to post-layout sign-off with open-source tools. First, the designer teaches the agent the gm/ID method: map the specifications to …
Learning to Formulate: Agentic Hardware-Software Co-Design of AI Infrastructure through Progressive Optimization and VerificationEDA & Tools · arXiv cs.AR (Hardware Architecture) · Summary
AI infrastructure, the chips and software that train and serve AI models, is designed in layers. Layers make the system manageable, but they also fix which choices an optimizer can consider.
Gains that need the chip and its software to change together are excluded before optimization begins: the formulation leaves them out. Language-model agents make it possible to revisit these boundaries, but an agent's proposal cannot show by itself that a design is correct or optimal.
We present Formulaic, …
Energy-Efficient FPGA Implementation of an End-to-End Cosine-Domain CNN Using High-Level SynthesisDesign & IP · arXiv cs.AR (Hardware Architecture) · Summary
The computational cost of conventional Convolutional Neural Networks (CNNs) limits their deployment in low-power devices for high-speed edge AI applications. This paper presents an end-to-end cosine-domain CNN (CD-CNN) architecture for energy-efficient FPGA inference using high-level synthesis (HLS).
The proposed architecture performs intermediate feature extraction using real-valued DCT-domain representations, avoiding complex-valued arithmetic and intermediate inverse transforms between spect…
Exploring and optimizing the Vivado Flow on large FPGA designs: A Practical Analysis of Strategies and Their Impact on TimingDesign & IP · arXiv cs.AR (Hardware Architecture) · Summary
Achieving timing closure in FPGA designs is crucial, especially for high-performance applications. The Vivado Design Suite offers several strategies for optimization, but finding the best configuration for a given project remains challenging.
This paper explores the various Vivado's timing directives and strategies to improve performance across timing, area, and runtime. Through two test-case designs, an NQR spectrometer SoC-FPGA and a digital readout ASIC prototype for high energy physics part…
GI-RTL-Fuzz: Grammar-Informed RTL Generation with LLMs for End-to-End Differential Simulator FuzzingEDA & Tools · arXiv cs.AR (Hardware Architecture) · Summary
Register-Transfer Level (RTL) simulators are fundamental to modern IC design workflows, yet like any complex software, they frequently contain critical bugs that compromise simulation accuracy.
To systematically stress-test these tools, we introduce GI-RTL-Fuzz, a grammar-informed fuzzing framework that leverages Large Language Models (LLMs) to generate high-quality RTL test cases. Our key innovation is guiding the LLM's generation process using Backus-Naur Form (BNF) grammar coverage informati…
The Code Behind the Layout: AI Agents for Analog Layout GeneratorsMarkets & Policy · arXiv cs.AR (Hardware Architecture) · Summary
Analog layout remains largely manual and hard to automate. Generator frameworks such as gLayout express layouts as programs, producing layouts from parameterized, design-rule-aware generators; however, writing such generators still takes expert effort.
Large language models (LLMs) could now write generator code, and frontier models can even draw layout geometry from design intent. This raises a practical question: if a model can draw the layout itself, what does a generator framework still cont…
zkDuel: Characterizing SumCheck Prover Kernels across GPU Programming ModelsDesign & IP · arXiv cs.AR (Hardware Architecture) · Summary
SumCheck is a central prover primitive in zero-knowledge proofs, exposing table-parallel work that maps naturally to GPUs but becomes increasingly arithmetic-intensive as finite fields widen. We study how this shift affects the cost of programming SumCheck in Triton rather than CUDA.
Our benchmark, zkDuel, provides matched implementations of 25 zkPHIRE-derived constraints alongside diagnostic polynomials, covering 32-, 64-, 128-, and 256-bit prime fields, with independent CPU-reference validati…
Nordic demo-es Bluetooth HDTMarkets & Policy · Electronics Weekly · Summary

Image: Electronics Weekly (opens in a new tab) Nordic Semiconductor, the low-power wireless connectivity specialist. Has demo-ed the upcoming Bluetooth® High Data Throughput (HDT) feature in silicon through its video demonstration.
With support for longer packets, Bluetooth HDT […] The post Nordic demo-es Bluetooth HDT appeared first on Electronics Weekly.
Intel Q4 forecast disappointsMarkets & Policy · Electronics Weekly · Summary

Image: Electronics Weekly (opens in a new tab) Intel’s Q3 revenue was $16.5 billion, up 21% YoY. Q4 revenue was forecast at $15 billion to $16 billion; “Our Q3 results demonstrate improving execution, meaningful progress expanding supply and […] The post Intel Q4 forecast disappoints appeared first on Electronics Weekly.
ASE raises advanced IC assembly, testing sales forecast for 2026Packaging & Test · Focus Taiwan (CNA) · Summary

Image: Focus Taiwan (CNA) (opens in a new tab) Taipei, Oct. 30 (CNA) Taiwan ASE Technology Holding Co., the world's largest IC packaging and testing service provider, has raised its sales forecast for 2026 for its leading-edge assembly and testing (LEAP) operations to US$4 billion, from a previous estimate of US$3.7 billion.
Product management in EDA companiesEDA & Tools · r/chipdesign · Summary
Hi! I have a technical background in chip design and am exploring a product management role in Synopsys or Cadence Design Systems, anyone made the transition?
How does it feel? Pros/cons?
I am told that my technical background is a must have and that it’s different from a vanilla product management role/ requires deep technical expertise, is this true? submitted by /u/randomtopics12 [link] [comments]
SK hynix Hosts First Partners Day in Japan, Sharing Business Direction with Key Local PartnersMarkets & Policy · SK hynix · Summary
As advances in AI technology drive rapid growth in memory demand, global collaboration is becoming increasingly important to securing stable supply chains. In order to share its business direction and further strengthen their partnerships, SK hynix brought together key partners
AI can design the chip, manufacturing it is harderMarkets & Policy · EDN (Electronics Design News) · Summary
Design lives primarily in a structured environment of models, rules, constraints, libraries, and solver outputs while manufacturing doesn’t. The post AI can design the chip, manufacturing it is harder appeared first on EDN.
PC chip plunge wipes out a quarter of Intel’s valueMarkets & Policy · The Register · Summary
Image: The Register (opens in a new tab) CEO predicts massive datacenter CPU boom, coming soon, but production problems mean Chipzilla may not cash in
Working at Samsung Semiconductor KoreanEquipment & Materials · r/semiconductors · Summary
I’m currently pursuing a master’s degree at a top-tier university in Korea, where my research focuses on 2D materials for memory applications. My goal is to work at Samsung Semiconductor.
Do foreigners have a realistic chance of getting a job in the memory division (both RnD and manufacturing)? submitted by /u/Flat-Pass-8398 [link] [comments]
Interview at Cadence for Analog Design Intern! AdviceEDA & Tools · r/semiconductors · Summary
submitted by /u/Dense-Scallion7553 [link] [comments]
Is CREDO open for acquisition?Markets & Policy · r/semiconductors · Summary
Does anyone know who is buying CREDO ticker CRDO? Nvidia, Broadcom, or MRVL? submitted by /u/Own-Aardvark6244 [link] [comments]
Career comparisonPackaging & Test · r/semiconductors · Summary
Currently I am working in Applied as TPS engineer Level3. And I have couple offers from multiple competitors.. if anyone works in same position then pls give me some advise Applied EPIC GPS (advanced package) ASM PEALD GPS LAM research test engineer submitted by /u/Good-Variation-190 [link] [comments]
Are Samsung Austin Semiconductor engineers also making millions?Markets & Policy · r/semiconductors · Summary
Asking because I hear about Samsung engineers in Korea minting millions and micron employees in America making millions, but nothing about Samsung people in America. submitted by /u/Kind_Doubt_8922 [link] [comments]
KLC Highlights TTV Thermal Testing for AI/HPC and Liquid Cooling, Chip-Wafer Layout Design, Alongside High-Voltage EV Heating SolutionsPackaging & Test · PR Newswire · Summary
The Taiwan-based manufacturer supports thermal validation for chip-wafer layout design, planning, design verification, high-performance computing, cold plates, liquid cooling, and electric vehicle thermal management. TAICHUNG, Oct. 29, 2026 /PRNewswire/ -- Taiwan King Lung Chin PTC Co.,...
Hybrid Bonding Is Costly. Is There a Cheaper Bumpless Option?Packaging & Test · TrendForce Insights · Summary

Image: TrendForce Insights (opens in a new tab) How three bumpless routes compare, and where bonder suppliers stand.
Meta Design Verification Engineer — Interview Loop Experience (2 Technical, 1 Design, 2 Behavioral)EDA & Tools · r/chipdesign · Summary
Hi everyone! I have an upcoming interview loop for a Design Verification Engineer role at Meta and would appreciate hearing from anyone who has recently gone through a similar interview process.
My loop consists of five 45-minute sessions: 2 Technical rounds 1 Design round 2 Behavioral rounds I would love to hear from candidates who have completed Meta’s DV interview loop: A few questions: What kinds of questions were asked in the two technical rounds? What should I expect in the design round? …
Ceva Expands NeuPro NPU Portfolio into AI InfrastructureDesign & IP · Embedded.com · Summary
Ceva Inc. has unveiled its next-generation NeuPro neural processing unit (NPU) portfolio, targeting AI workloads ranging from always-on sensing and advanced edge systems to cloud and data center infrastructure.
Built on a common architecture and unified software development kit (SDK), the new portfolio delivers up to 2× higher AI throughput per square millimeter and 50% [...] The post Ceva Expands NeuPro NPU Portfolio into AI Infrastructure appeared first on Embedded.
Amazon SageMaker AI now supports SOCI-indexed images to start training jobs in secondsDesign & IP · AWS pricing (EC2 / capacity blocks) · Summary
Today, Amazon SageMaker AI announces support for Seekable OCI (SOCI)-indexed container images for training and processing jobs, so your jobs start running your code sooner.
SOCI-indexed images start Amazon SageMaker AI training containers in seconds, cutting GPU idle time during image pulls by up to 90%, with no impact on training performance. Before a training or processing job can run, SageMaker AI downloads its container image to the instance.
For deep learning images, which routinely exceed…
Thursday 29 October 202679 stories
Korea's state fund anchors FuriosaAI's US$620 million round in push for homegrown AI chipsDesign & IP · r/hardware · Summary

Image: r/hardware (opens in a new tab) submitted by /u/Denisova_Hominin [link] [comments]
Vietnam's First Semiconductor Plant: 2027 Pilot Production Target Flashing Yellow as ASML Equipment Deal Still UnsignedEquipment & Materials · r/hardware · Summary
Vietnam's first semiconductor plant is finding its goal of starting pilot production in 2027 increasingly difficult to achieve.
The project is being developed by Viettel, a military-run telecommunications and defense group with no track record of building semiconductor fabs, and administrative hurdles in securing government funding are contributing to the delay.
Negotiations to buy DUV lithography equipment from ASML have been under way for several months without a contract, and the planned con…
TANAKA and MEP to Establish Precious Metal Refining Joint Venture in MalaysiaMarkets & Policy · Semiconductor Digest · Summary
The new company will be established in Batu Kawan Industrial Park in Penang, Malaysia, with TANAKA’s holding a 66.7% stake and MEP holding a 33.3% stake. The post TANAKA and MEP to Establish Precious Metal Refining Joint Venture in Malaysia appeared first on Semiconductor Digest.
Entrepix Introduces Head360 CMP Head Rebuild ServicesEquipment & Materials · Semiconductor Digest · Summary
Comprehensive rebuild solution helps semiconductor manufacturers extend CMP head life and maintain equipment performance. The post Entrepix Introduces Head360 CMP Head Rebuild Services appeared first on Semiconductor Digest.
Intel confirms Nova Lake will use advanced 18A-P node, more details at CES — company says it's taking Panther Lake capacity offline to build more Granite Rapids data center CPUsFoundry & Manufacturing · Tom's Hardware · Summary

Image: Tom's Hardware (opens in a new tab) Intel's next-gen Nova Lake desktop processors will be the first client product to use Intel's enhanced 18A-P node, CEO Lip-Bu Tan confirmed in the company's Q3 2026 earnings call.
Nagare Labs Emerges from Stealth to Break AI’s Memory BottleneckMarkets & Policy · Semiconductor Digest · Summary
Atlanta based spinout raises $5M from Playground Global to build a new memory tier. The post Nagare Labs Emerges from Stealth to Break AI’s Memory Bottleneck appeared first on Semiconductor Digest.
Intel stock plunges 16% as chipmaker blames PC slowdown for weak guidanceMarkets & Policy · CNBC Technology · Summary

Image: CNBC Technology (opens in a new tab) Intel has been a Wall Street darling this year due to its emergence as a player in AI, but the company is being weighed down by a struggling PC market.
Intel stock falls 17% as it forecasts weaker chip salesMarkets & Policy · Financial Times - Semiconductors · Summary
Lower-than-expected sales forecasts dent chipmakers’ turnaround prospects