News from November 2026
678 stories of semiconductor news published on the Hub in November 2026, newest first and grouped by day (UTC). Each headline opens the story's page on the Hub, with a summary and a link to the original report.
Showing 501 to 550 of 678 stories.
Wednesday 4 November 202680 stories
Efficient Computer’s Electron E1 processor adopted by edgeAIDesign & IP · Electronics Weekly · Summary

Image: Electronics Weekly (opens in a new tab) Efficient Computer, the company claiming to build the world’s most energy-efficient processors, has announced that edgeAI has selected its Electron E1 processor to develop high-performance, energy-efficient solutions for physical AI […] The post Efficient Computer’s Electron E1 processor adopted by edgeAI appeared first on Electronics Weekly.
AMD on track to overtake Intel as biggest x86 outfitMarkets & Policy · The Register · Summary
Image: The Register (opens in a new tab) CEO says supply chain can cope with surging datacenter and AI demand
PIMCQG: Co-Designing Billion-Scale Graph-Based Approximate Nearest Neighbor Search for Processing-in-MemoryDesign & IP · arXiv cs.AR (Hardware Architecture) · Summary
Graph-based Approximate Nearest Neighbor Search (ANNS) has emerged as the dominant approach for large-scale AI applications, offering superior accuracy-efficiency trade-offs over alternative methods. However, graph-based ANNS is inherently memory-bound due to frequent and irregular graph traversal.
This constrains CPU throughput due to limited memory bandwidth, while GPUs lack sufficient HBM capacity for billion-scale indexes. Processing-in-Memory (PIM) offers massive internal bandwidth by co-l…
DynaMite: Dynamic Measurement Scheduling To Accelerate Fault-Tolerant Quantum ProgramsMarkets & Policy · arXiv cs.AR (Hardware Architecture) · Summary
Fault-tolerant quantum computers run millions of logical cycles to perform quantum error correction (QEC). As logical operations span entire logical cycles, the logical cycle time (LCT) dictates program runtime.
Qubit measurements, critical to extract parity information for QEC, are the slowest operations and account for 43-86% of LCT. Measurement latencies impact fidelity: fast measurements lower our ability to correctly classify quantum states, whereas slow measurements increase the likelihoo…
A RISC-V Simulator for the Tenstorrent Tensix ArchitectureDesign & IP · arXiv cs.AR (Hardware Architecture) · Summary
RISC-V based AI accelerators have become popular and not only for AI and ML, but also as vehicles for exploring HPC workloads more generally.
Tenstorrent are one example, and whilst they document their Tensix architecture in detail and develop their software stack openly, running code has historically required a physical card, and their recently released simulator targets hardware equivalence rather than introspection.
In this paper we present Wolfpine, a community developed RISC-V simulator fo…
Deep Learning Compilers: Architecture, Optimization, and Empirical CharacterizationDesign & IP · arXiv cs.AR (Hardware Architecture) · Summary
As deep learning (DL) models become increasingly complex and hardware architectures grow more heterogeneous, DL compilers play a critical role in optimizing computational efficiency and enabling scalable deployment.
This paper presents a systematic analysis of DL compilers, covering their architectural evolution, compilation workflows, optimization techniques, and emerging research directions. We organize DL compiler architectures into frontend, middle-end, and backend stages, emphasizing the r…
UMLoad: Fast On-Demand Model Loading on Unified Memory ArchitectureDesign & IP · arXiv cs.AR (Hardware Architecture) · Summary
On-demand model loading dominates response latency for interactive on-device AI, yet unified memory architectures (UMAs), now common on edge devices, should make it cheap by placing weights in memory the GPU already sees. However, frameworks still use the loading flow built for discrete GPUs, leaving significant inefficiencies.
This paper presents UMLoad, a system-level model-loading accelerator that decouples a framework's logical allocations from their physical page backing. UMLoad uses on-de…
GC-MoE: Overlapping Expert-Parallel Token Dispatch with FP8/FP4 Grouped GEMM via CUDA Green ContextsMarkets & Policy · arXiv cs.AR (Hardware Architecture) · Summary
Under expert parallelism, mixture-of-experts (MoE) layers pay all-to-all token dispatch, grouped GEMMs, and a combine step in every layer. In decode each rank holds only 1-256 tokens: dispatch latency and weight traffic dominate while tensor-core utilization is inherently low.
In fused operators such as DeepGEMM's Mega MoE, dispatch and computation overlap only by sharing every SM: dispatch warps compete with TMA/MMA and epilogue warps for registers, shared memory, and issue slots; every phase …
GSPIM: A Temporal-Locality-Aware 4DGS Accelerator for PIM-Enabled Edge DevicesDesign & IP · arXiv cs.AR (Hardware Architecture) · Summary
4D Gaussian Splatting (4DGS) enables high-quality real-time novel-view synthesis for dynamic scenes, supporting free-viewpoint video, mobile XR, and autonomous systems at the edge. Methods using explicit 4D distributions, keyframe interpolation, or anchor binding share two GPU data-movement bottlenecks.
Temporal filtering follows model record loading, wasting LPDDR5 bandwidth on inactive data. Frame-isolated execution also overlooks highly overlapping active sets and depth relationships across …
HyPAIC: Personal AI Computer with High Bandwidth Flash for High Performance Trillion-Parameter LLM InferenceDesign & IP · arXiv cs.AR (Hardware Architecture) · Summary
LLMs have rapidly expanded from simple chatbots to agentic AI, where models directly use tools to solve complex problems. To improve problem solving, most frontier LLMs adopt an MoE architecture, pushing model sizes into the trillion-parameter regime.
While cloud services have dominated large-scale LLM inference, cost and security concerns drive demand for on-premises deployment. Thus, GPU manufacturers have introduced personal AI computers (PAICs).
However, existing PAICs with LPDDR-based unif…
AMD Q3 2026 Earnings Data Center Growth Drives Record QuarterMarkets & Policy · ServeTheHome · Summary

Image: ServeTheHome (opens in a new tab) AMD Q3 2026 earnings were massive with the data center and embedded segments seeing big uplift with the clear Venice x86 leadership looming The post AMD Q3 2026 Earnings Data Center Growth Drives Record Quarter appeared first on ServeTheHome.
TSMC scheduled to list NT$14.8 billion green bonds on Nov. 12Foundry & Manufacturing · Focus Taiwan (CNA) · Summary

Image: Focus Taiwan (CNA) (opens in a new tab) Taipei, Nov. 4 (CNA) Taiwan Semiconductor Manufacturing Co. (TSMC) is scheduled to list NT$14.8 billion (US$450 million) in green bonds on Nov. 12, the Taipei Exchange (TPEx) said Wednesday.
Top Ten (+10) Semiconductor Companies In Q2Markets & Policy · Electronics Weekly · Summary
Thanks to Semiconductor Intelligence for this one – the top 20 semiconductor manufacturers in Q2 measured by revenue. The post Top Ten (+10) Semiconductor Companies In Q2 appeared first on Electronics Weekly.
Viettel Group and Vietnam's Government Cipher Committee Unveil Security Chip Embedding Vietnamese Cryptography in SiliconMarkets & Policy · PR Newswire · Summary

Image: PR Newswire (opens in a new tab) HANOI, Vietnam, Nov. 3, 2026 /PRNewswire/ -- Vietnam's Government Cipher Committee and Viettel Group have unveiled VGC v1.0, a security chip integrating a domestically developed cryptographic algorithm directly into silicon, alongside the country's first domestically designed secure...
Is There Room for Small-Scale OSATs in India’s Chip Packaging Boom?Packaging & Test · EE Times · Summary

Image: EE Times (opens in a new tab) Small OSATs in India can start with ₹1.5–₹2 billion (~$15.8–$21 million), consultant Nitin Dodia said. But anchor customers, skilled staff, and qualification determine who survives.
The post Is There Room for Small-Scale OSATs in India’s Chip Packaging Boom? appeared first on EE Times.
Tuesday 3 November 202680 stories
SoC-Based BLDC Motor Controller Moves up to 40 MotorsDesign & IP · Electronic Design · Summary

Image: Electronic Design (opens in a new tab) The Microchip-made board can be used for evaluating and developing sensor and sensorless FOC for BLDC motor-control applications.
Highly Integrated PFC Controller Factors into Kilowatt Power SuppliesMarkets & Policy · Electronic Design · Summary

Image: Electronic Design (opens in a new tab) STMicroelectronics’ latest PFC controller offers extensive protection for switched-mode power supplies with outputs of up to several kW.
What’s in the November/December 2026 Issue?Markets & Policy · Semiconductor Digest · Summary

Image: Semiconductor Digest (opens in a new tab) Each issue of Semiconductor Digest has articles found only in the magazine. Click on the links to read the articles in the November/December issue.
If you are attending SEMICON Europa, pick up an issue in print at the Tech Arena. The post What’s in the November/December 2026 Issue? appeared first on Semiconductor Digest.
Nvidia is happy to take your money whether you're using open or closed models, says Jensen HuangMarkets & Policy · The Register · Summary
Image: The Register (opens in a new tab) At Fireworks Forge, a celebration of specialized models
AMD stock jumps 7% on earnings as data center revenue nearly doublesMarkets & Policy · CNBC Technology · Summary

Image: CNBC Technology (opens in a new tab) AMD reported better-than-expected third-quarter results, driven by booming sales of AI chips
Nokia Takes AI-RAN from Roadmap to Live Network at NVIDIA GTC BerlinMarkets & Policy · Moor Insights & Strategy · Summary

Image: Moor Insights & Strategy (opens in a new tab) NVIDIA invested $1 billion in Nokia about a year ago, and Nokia launched its commercial AI radio access network (AI-RAN) platform just three months ago. That made NVIDIA GTC Berlin Nokia’s first big chance to demonstrate operator traction, not just the roadmap it showed at MWC 2026.
Nokia had a lot of news at the […] The post Nokia Takes AI-RAN from Roadmap to Live Network at NVIDIA GTC Berlin appeared first on Moor Insights & Strategy.
Analog Devices Completes Acquisition of Alif SemiconductorMarkets & Policy · PR Newswire · Summary

Image: PR Newswire (opens in a new tab) WILMINGTON, Mass., Nov. 3, 2026 /PRNewswire/ -- Analog Devices, Inc. (NASDAQ: ADI) today announced the completion of its acquisition of Alif Semiconductor. The combination of ADI's leadership across sensing, signal processing, power, connectivity and application software, with Alif's...
Nordic Launches nRF71 SoCs for Low-Power Wi-Fi and Edge AIDesign & IP · Embedded.com · Summary
Nordic Semiconductor has introduced the nRF71 series, a family of ultra-low-power system-on-chips (SoCs) that combine Wi-Fi, Bluetooth Low Energy (LE), Thread, and edge AI capabilities in a single device.
Designed for battery-powered connected products, the new platform delivers up to 20 times lower standby power consumption than the previous-generation nRF70 Series Wi-Fi products. The nRF71 [...] The post Nordic Launches nRF71 SoCs for Low-Power Wi-Fi and Edge AI appeared first on Embedded.
Bosch to form dedicated semiconductor division, targeting growth in new marketsMarkets & Policy · Semiconductor Today · Summary
Aiming to generate €5bn in semiconductor sales by 2030, as part of reorganizing its corporate structure and the evolution of Bosch Mobility (announced at the end of October), on 1 January 2028 Germany-based tier-1 automotive supplier Bosch will transfer its semiconductor operations (currently part of its Mobility Electronics division) to a new division called Semiconductors, while continuing to be assigned to the Mobility business sector...
Tower Semiconductor and Innolight Advance High-Performance Near-Package Optics for AI InfrastructureFoundry & Manufacturing · Semiconductor Digest · Summary
Leveraging Tower's 200mm and 300mm Silicon Photonics platforms, the collaboration supports multiple generations of Near-Packaged Optics development for AI infrastructure. The post Tower Semiconductor and Innolight Advance High-Performance Near-Package Optics for AI Infrastructure appeared first on Semiconductor Digest.
ACM Research Announces Shipment of Its First 310 × 310 mm Ultra ECP ap-p Panel-Level Horizontal Electroplating Production ToolPackaging & Test · Semiconductor Digest · Summary
ACM Research, Inc., a supplier of wafer processing solutions for semiconductor and advanced packaging applications, today announced the shipment of its first 310 × 310 mm Ultra ECP ap-p panel-level horizontal electroplating production system to a customer in Asia outside mainland China.
The post ACM Research Announces Shipment of Its First 310 × 310 mm Ultra ECP ap-p Panel-Level Horizontal Electroplating Production Tool appeared first on Semiconductor Digest.
Bosch Establishes Dedicated Semiconductor Division to Strengthen Chip BusinessMarkets & Policy · Semiconductor Digest · Summary
Effective January 1, 2028, Bosch will transfer its semiconductor operations to a new division called Semiconductors. The business will continue to be assigned to the Mobility business sector.
Bosch’s semiconductor operations are currently part of its Mobility Electronics division. The post Bosch Establishes Dedicated Semiconductor Division to Strengthen Chip Business appeared first on Semiconductor Digest.
Software and the Economics of Agentic AIMarkets & Policy · Creative Strategies · Summary

Image: Creative Strategies (opens in a new tab) AMD Series · Part 3 of 3 Compute choice, fungibility, and the cost of correctly completed work As companies put AI into everyday work, we expect attention to shift toward everything required to complete a task. An agent may use a model to interpret a request, retrieve company information, call an application, and then check the
Bringing standards-based thinking earlier into rigid-flex designEDA & Tools · Global Electronics Association (formerly IPC) · Summary

Image: Global Electronics Association (formerly IPC) (opens in a new tab) Bringing standards-based thinking earlier into rigid-flex design Nov 3, 2026 IPC Standards Key Summary Integrate IPC standards early in rigid-flex PCB design to support manufacturability, reliability and clearer communication across design, fabrication and assembly teams.
Use IPC-2223E, IPC-6013, IPC-2221 and IPC-TM-650 to establish common expectations for printed board design, performance, qualification and testing. Review critical design requirements before fabrication with the Cadence Rigid-…
IP update from Alphacore at DAC 2026Markets & Policy · SemiWiki Forums · Summary
Rusafa Shahreen, Director of Technical Marketing at Alphacore met with me at DAC 2026 to provide an update on what’s new in their IP for AMS, RF, imaging and rad-hard designs. Her background includes MSEE and MBA degrees, plus seven years at Alphacore in Arizona.
The founders of the company have a rad-hard background and their early… Read More The post IP update from Alphacore at DAC 2026 appeared first on SemiWiki.
Accelerating engineering for the physical worldEDA & Tools · LLM provider pricing pages (Anthropic, OpenAI, Google, xAI, DeepSeek, Together) · Summary
Discover how ChatGPT and Codex are helping engineers accelerate CAD, PCB design, simulation, and other workflows across the physical world.
Randomized Caches in HW: Overheads And Limitations (RUB, Max Planck, Georgia Tech)Markets & Policy · Semiconductor Engineering · Summary

Image: Semiconductor Engineering (opens in a new tab) Researchers at Ruhr University Bochum, the Max Planck Institute for Security and Privacy, and Georgia Tech published “Randomized Caches in Hardware: Challenges and Trade-offs.” Abstract Excerpt: “Randomized caches protect against side-channel attacks by obfuscating the mapping of memory addresses to cache locations.
Existing proposals typically describe architectural behavior, leaving practical hardware implementation challenges largely unexplored.... » read more The post Randomized Caches in H…
Introducing Physical-Engineering’s Last Exam for agentsPackaging & Test · Google Cloud pricing (GPU / TPU) · Summary

Image: Google Cloud pricing (GPU / TPU) (opens in a new tab) Authors: Burak Gokturk, VP Research & Development; Rujun Han, Research Scientist; George Lee, Product Manager.
Today, the Google AI & Infrastructure team is announcing Physical-Engineering's Last Exam (PLE), a new benchmark and open competition, developed in collaboration with Mercor, and built to test a frontier model’s ability to complete tasks in mechanical, electrical, civil and structural engineering.
To help the research community measure and improve how agents handle physical engineering…
Fast, Sub-Volt HZO Ferroelectric Capacitors For DRAM-Like Memory (SNU)Markets & Policy · Semiconductor Engineering · Summary

Image: Semiconductor Engineering (opens in a new tab) Seoul National University-led researchers published “Resolving the Kay–Dunn limit and the speed–endurance dilemma in ferroelectric Hf0.5Zr0.5O2 for DRAM-class sub-volt capacitors.”
The first author, Geun Hyeong Park, Ph.D., summarizes the work here: “Fast, frequently rewritten memory requires low operating voltages, rapid switching, and high cycling endurance. In ferroelectric capacitors, however, accelerating polarization switching often requires higher voltages that... » read more The post Fa…
Five rules for evaluating agent skills before they bloat your context windowPackaging & Test · Google Cloud pricing (GPU / TPU) · Summary

Image: Google Cloud pricing (GPU / TPU) (opens in a new tab) You’re probably hearing more about SKILL.md files, and you’ll see that a lot of people test them the same way: paste a prompt into chat, watch it pass once on a laptop, and merge to main.
But when you paste three pages of CLI docs into a markdown file without an evaluation loop, you are just as likely to confuse a frontier model as you are to help it. For the past weeks, we have been diligently measuring and optimizing our own Google Cloud Developer Plugin, with the most essential skills and th…
OpenAI introduces program to reduce AI data center energy demand during peak hoursMarkets & Policy · Tom's Hardware · Summary

Image: Tom's Hardware (opens in a new tab) The Grid Protectors Program applies load shedding, a technique in use since the 1970s, to data centers.
Ceva’s next NeuPro generation opens new possibilities across AIDesign & IP · SemiWiki Forums · Summary
Ceva is broadening the possibilities for AI silicon with a new generation of its NeuPro neural processing unit portfolio, bringing a common architecture and unified software environment to applications spanning sensors, intelligent devices and cloud infrastructure.
Announced on October 28, the portfolio reflects an opportunity:… Read More The post Ceva’s next NeuPro generation opens new possibilities across AI appeared first on SemiWiki.
SemiQ previewing Gen4 1700V, 830A SiC MOSFET modules at electronicaEquipment & Materials · Semiconductor Today · Summary
On the stand (A6.620) of its distribution and exhibition partner Alfatec at electronica 2026 in Munich, Germany (10–13 November), SemiQ Inc of Lake Forest, CA, USA — which designs, develops and manufactures custom silicon carbide (SiC) power semiconductors and 150mm SiC epitaxial wafers for high-voltage applications — is giving an advanced preview of an upcoming Gen4 1700V SiC half-bridge MOSFET module...
Advanced Packaging Outlook 2027: Five Trends Reshaping CoWoS, HBM and ChipletsPackaging & Test · TechInsights · Summary
Advanced Packaging Outlook 2027: Five Trends Reshaping CoWoS, HBM and Chiplets JWinters Tue, 11/03/2026 - 16:31
AI Is Changing How Semiconductor Fabs Work — and Engineers Are Moving Faster Because of ItFoundry & Manufacturing · NVIDIA · Summary

Image: NVIDIA (opens in a new tab) Demand for advanced chips is rising. The processes to build them are getting more complex.
And the margin for error is shrinking. For engineers, understanding how a process change will behave, how a material will interact with a new step, how a defect maps back to a root cause are critical, challenging steps in semiconductor […]
Intel 14A moves closer to production as PDK 0.9 becomes available — plans to release PDK 1.0 in the first quarter of 2027Foundry & Manufacturing · Tom's Hardware · Summary

Image: Tom's Hardware (opens in a new tab) Intel says its next-generation process technology is reaching expected performance and yield maturity.
Arm & SoftBank: Part 2 - Masa’s gifts arriveDesign & IP · The Chip Letter · Summary

Image: The Chip Letter (opens in a new tab) Part 2 of an extended discussion, covering what happened following the Softbank takeover of Arm in 2016
Elethron to build UK AlN substrate manufacturing capabilityEquipment & Materials · Semiconductor Today · Summary
Elethron Ltd of London, UK — an advanced materials and process engineering company developing high-performance semiconductor materials and engineered substrates for ultrawide-bandgap technologies — plans to establish a UK manufacturing capability for aluminium nitride (AlN) substrates, starting with 2-inch wafers for customer evaluation, device fabrication trials and industrial qualification...
Sony IMX742 1mm square image sensor serves single-use endoscopesMarkets & Policy · Electronics Weekly · Summary

Image: Electronics Weekly (opens in a new tab) Sony has announced its IMX742, a CMOS image sensor for single-use endoscopes. The company highlights it as the industry’s first to support digital output and data transmission through a 5m […] The post Sony IMX742 1mm square image sensor serves single-use endoscopes appeared first on Electronics Weekly.
Accepting Orders for the LED Light-Sourced Projection AlignersEquipment & Materials · EE Times · Summary

Image: EE Times (opens in a new tab) Ushio has been accepting orders for LED-based UX-4 wafer aligners since July 2026, offering mercury-free, high-throughput lithography. The post Accepting Orders for the LED Light-Sourced Projection Aligners appeared first on EE Times.
ESD eBook November/December 2026: Edge Computing Powers Intelligent Decision-MakingMarkets & Policy · Embedded.com · Summary
Embedded system technologies are becoming the centerpiece for smarter decisions as data moves closer to where it's created. The post ESD eBook November/December 2026: Edge Computing Powers Intelligent Decision-Making appeared first on Embedded.
Bambu Lab H3C 3D printer review: A nine-tool monsterMarkets & Policy · Tom's Hardware · Summary

Image: Tom's Hardware (opens in a new tab) The Bambu Lab H3C is a massive tool changer that handles TPU like nobody’s business.
Hands-on with the DockCase Mount Ling 2 ProMarkets & Policy · Tom's Hardware · Summary

Image: Tom's Hardware (opens in a new tab) The Mount Ling 2 Pro is a dock for Nintendo Switch 2, Steam Deck, or other PC handhelds that doubles as a capture card and a vehicle for up to 4TB of NVMe SSD storage.
Apple faces unprecedented memory cost increases as RAM prices continue to surge, manufacturing bill climbs by $33 billionMarkets & Policy · Tom's Hardware · Summary

Image: Tom's Hardware (opens in a new tab) Samsung, SK hynix, and Micron are facing strong demand for memory from AI data centers, prompting manufacturers to prioritize higher-margin server products and high-bandwidth memory. That shift is tightening supplies of conventional DRAM and NAND flash used in smartphones, laptops, and other consumer devices.
The squeeze is also affecting smaller manufacturers, with Fairphone reporting that memory now accounts for nearly 60% of the bill of materials for some of its phones
How Allegro MicroSystems Increased OEE by Several Percentage Points with yieldHUB LiveFoundry & Manufacturing · SemiWiki Forums · Summary
Allegro MicroSystems’ experience with yieldHUB Live shows how better use of production data can translate into measurable manufacturing gains. At its high-volume semiconductor operation in the Philippines, Allegro set out to improve overall equipment effectiveness, or OEE, by one percentage point.
According to the customer… Read More The post How Allegro MicroSystems Increased OEE by Several Percentage Points with yieldHUB Live appeared first on SemiWiki.