Defect level (DPPM) estimator

How it works

Defect level is the share of parts that pass production test and are still bad. It is quoted in defective parts per million (DPPM). This tool turns process yield and fault coverage into a DPPM figure with the Williams and Brown model and the Agrawal, Seth and Agrawal model, and works backwards to the coverage a DPPM target needs.

1. Find the yield. Enter the process yield, or compute it from defect density and die area. Poisson treats defects as random and independent, Murphy softens that for clustering, and the negative binomial model has a clustering factor alpha. Area is in cm2 (100 mm2 is 1 cm2).Poisson: Y = e^(−A x D0); Murphy: Y = ((1 − e^(−A x D0)) / (A x D0))^2; negative binomial: Y = (1 + A x D0 / alpha)^(−alpha)
2. Combine the coverage figures. Stuck-at, transition and cell-aware coverage come from the pattern generator's reports. They are blended with weights you set (for example the share of the fault universe each one addresses) into one effective coverage. A derating, in percentage points, allows for real defects that none of the fault models describe. Set a weight to zero to leave a figure out.T = (w1 x T stuck-at + w2 x T transition + w3 x T cell-aware) / (w1 + w2 + w3) − derating
3. Williams and Brown defect level. If every fault is equally likely and independent, the share of passing parts that are bad depends only on yield and coverage. The share of tested die that pass is Y^T.DL = 1 − Y^(1 − T); share passing = Y^T
4. Agrawal, Seth and Agrawal defect level. Real defects cluster, so a faulty chip usually carries several faults and is easier to catch than a chip with one. The model adds n, the average number of faults on a faulty chip. The numerator is the share of all die that are bad and still pass; the share of die that pass is Y plus that term. A larger n gives a lower defect level at the same coverage. n is fitted from wafer test data; the default is an editorial value.DL = (1 − T)(1 − Y) e^(−(n − 1) T) / (Y + (1 − T)(1 − Y) e^(−(n − 1) T))
5. Escapes and later screens. Escapes in a lot are the parts shipped times the defect level. Burn-in, system-level test and outlier screens can catch a share of the escapes, which scales the defect level down by one minus that share.shipped per lot = tested x share passing; escapes per lot = shipped x DL x (1 − later screen share)
6. Coverage a target needs. For Williams and Brown the equation inverts exactly. For the Agrawal model the tool solves for the coverage by bisection, which works because the defect level falls steadily as coverage rises. The target is first divided by one minus the later screen share, so the answer is the coverage the test itself must reach.Williams and Brown: T = 1 − ln(1 − DL target) / ln(Y); Agrawal: solve DL(T) = DL target for T

Sources

The methods and default figures rest on these public sources. The wording here is our own; read the source for its full text.

• Defect Level as a Function of Fault Coverage (opens in a new tab), T. W. Williams and N. C. Brown, IEEE Transactions on Computers, vol. C-30, no. 12, pp. 987-988, December 1981. DL = 1 − Y^(1 − T).
• Fault Coverage Requirement in Production Testing of LSI Circuits (opens in a new tab), V. D. Agrawal, S. C. Seth and P. Agrawal, IEEE Journal of Solid-State Circuits, vol. SC-17, no. 1, pp. 57-61, February 1982. Model with the average number of faults on a faulty chip, n, and the yield.
• Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits, chapter 3, Test Economics and Product Quality, M. L. Bushnell and V. D. Agrawal, Kluwer Academic Publishers, 2000. Textbook treatment of yield and defect level as a quality measure.