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Synthesising the customer design to the configurable cells, inserting test, trying placement and routing on the fixed base and reviewing the netlist with the customer, until the netlist is frozen and only reviewed changes are accepted, each with its effect on timing and schedule stated.
Where this stage sits
This stage with its neighbours. Each row is a discipline active here, shaded by how mature its work is by the end of each stage.
Key0.0Planned0.3Early draft0.5Draft0.8Feature complete1.0CompleteFreezeFrozenFaded block: still at the step shown before it, Held below Complete or Maintained under change control once complete or frozenFreeze or sign-off pointMilestone for one item; the rest of the work carries onMilestone gateYou are here: Customer Design ImplementationAI impactDDisruption (red)AAugmentation (blue)OOpportunity (green)How AI is changing the workWhat the steps meanWhat the codes mean
FPGA Prototype Conversion: maturity 1.0, Complete. Platform offered to customers on a qualified base; each customer device is released for volume orders, and the roadmap, the platform's updates and its end of life are managed from here.
Customer Design Implementation: maturity 1.0, Complete. Platform offered to customers on a qualified base; each customer device is released for volume orders, and the roadmap, the platform's updates and its end of life are managed from here.
Customer Design Closure & Sign-off: maturity 1.0, Complete. Platform offered to customers on a qualified base; each customer device is released for volume orders, and the roadmap, the platform's updates and its end of life are managed from here.
FPGA Prototype Conversion: maturity Freeze, Frozen. Cells locked into the base masks; the kit is released again once correlated with silicon, then changed only through reviewed updates notified to customers.
Customer Design Implementation: maturity Freeze, Frozen. Cells locked into the base masks; the kit is released again once correlated with silicon, then changed only through reviewed updates notified to customers.
Customer Design Closure & Sign-off: maturity Freeze, Frozen. Cells locked into the base masks; the kit is released again once correlated with silicon, then changed only through reviewed updates notified to customers.
FPGA Prototype Conversion: maturity 0.5, Draft. FPGA prototype converted: primitives mapped, clocks and input and output re-planned, and the result shown equivalent and agreed.D
Customer Design Implementation: maturity 0.8, Feature complete. Customer design reviewed with the customer at the netlist freeze.
Customer Design Closure & Sign-off: maturity 1.0, Complete. Customer design signed off by the customer on the placed and routed design, with every open review point closed.
FPGA Prototype Conversion: maturity 0.5, Draft. Trial implementation of the converted design through the reference flow, with timing and routing gaps listed.D
Customer Design Implementation: maturity 0.8, Feature complete. Netlist synthesised to the configurable cells and frozen, with placement and routing tried on the fixed base.D
Customer Design Closure & Sign-off: maturity 1.0, Complete. Design placed, routed and signed off for timing and physical checks on the fixed base.
FPGA Prototype Conversion: maturity 0.5, Draft. Environment and first results: the converted design proven equivalent to the prototype, with the checks running on the agreed baseline.O
Customer Design Implementation: maturity 0.8, Feature complete. Results: the customer netlist verified and checked for equivalence with the agreed design at the netlist freeze, with coverage closure under way.O
FPGA Prototype Conversion: maturity 0.3, Early draft. Test plan for the customer design drawn up from the converted design and the platform test architecture: coverage targets and test time.
Customer Design Implementation: maturity 0.5, Draft. Test inserted in the customer netlist at the netlist freeze, with its coverage being measured.
Customer Design Closure & Sign-off: maturity 0.8, Feature complete. Coverage goals met at the design sign-off, and the sample test program built from the taped-out design.A
FPGA Prototype Conversion: maturity 0.3, Early draft. Banked wafers allocated to the customer design and a custom mask slot planned with the foundry.
Customer Design Implementation: maturity 0.5, Draft. Custom mask order and wafer finishing prepared against the design's netlist freeze and sign-off.
Customer Design Closure & Sign-off: maturity 0.5, Draft. Custom mask order and wafer finishing prepared against the design's netlist freeze and sign-off.
FPGA Prototype Conversion: maturity 0.3, Early draft. Device qualification plan drafted: what the device can claim by similarity to the base array family and what it must test itself.
Customer Design Implementation: maturity 0.5, Draft. Qualification plan agreed with the customer against the netlist freeze and the design sign-off.
Customer Design Closure & Sign-off: maturity 0.5, Draft. Qualification plan agreed with the customer against the netlist freeze and the design sign-off.
FPGA Prototype Conversion: maturity 0.5, Draft. Customer programme running on the converted design, with schedule and changes agreed with the customer.
Customer Design Implementation: maturity 0.5, Draft. Customer programme running on the converted design, with schedule and changes agreed with the customer.
Customer Design Closure & Sign-off: maturity 0.8, Feature complete. Customer sign-off recorded; samples and deliveries planned with the customer.
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