Stack and multi-die yield calculator
Estimate the yield of a die stack or multi-die package from die yield, known-good-die test escapes, bond yield per interface, repair and assembly yield.
ReliabilityFree to useHow it worksSourcesWhere it helps
Fills the inputs below with typical figures. Replace any of them with your own.
- Good stacks per 100 started
- 80.2
- Final stack yield 80.2% across 8 dies and 8 interfaces
- Cost per good stack
- $150.11
- $120.45 to start one, plus $29.66 of failed-stack cost
- Good dies scrapped per good stack
- 1.96
- Worth $20.39
- Stack yield before repair
- 80.9%
- Dies 96.5%, TSVs 90.8%, bonds 92.3%
- Bond yield per interface for 80% stack yield
- 98.94%
- You entered 99.00%
Losses in order from the first step; the two recoveries are gains and are marked.
- Bad dies that passed test3.49
- TSV and back-side process8.89
- Bond interfaces6.77
- Recovered by repair or redundancy+3.83recovered
- Base die or interposer3.39
- Final assembly and test3.25
- Recovered by rework+2.20recovered
Show the data as a table
| Item | Stacks per 100 started |
|---|---|
| Bad dies that passed test | 3.49 |
| TSV and back-side process | 8.89 |
| Bond interfaces | 6.77 |
| Recovered by repair or redundancy | +3.83 |
| Base die or interposer | 3.39 |
| Final assembly and test | 3.25 |
| Recovered by rework | +2.20 |
- Dies, tested$103.6769%
- Base die or interposer$18.6912%
- Assembly$27.4218%
- Rework$0.3280%
Show the data as a table
| Item | Cost (USD) |
|---|---|
| Dies, tested | $103.67 |
| Base die or interposer | $18.69 |
| Assembly | $27.42 |
| Rework | $0.328 |
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- Bond yield 99% per interface (solid line, circles)
- Bond yield 99.5% per interface (dashed line, squares)
Show the data as a table
| Dies in the stack | Bond yield 99% per interface | Bond yield 99.5% per interface |
|---|---|---|
| 4 | 86.3 | 87.5 |
| 5 | 84.7 | 86.2 |
| 6 | 83.2 | 84.9 |
| 7 | 81.7 | 83.7 |
| 8 | 80.2 | 82.4 |
| 9 | 78.8 | 81.3 |
| 10 | 77.5 | 80.1 |
| 11 | 76.1 | 79 |
| 12 | 74.8 | 77.8 |
| 13 | 73.6 | 76.8 |
| 14 | 72.3 | 75.7 |
| 15 | 71.1 | 74.6 |
| 16 | 70 | 73.6 |
| Dies in the stack | Yield at your bond yield | Yield at the comparison bond yield | Cost per good stack at your bond yield |
|---|---|---|---|
| 4 | 86.3% | 87.5% | $91.33 |
| 5 | 84.7% | 86.2% | $105.32 |
| 6 | 83.2% | 84.9% | $119.77 |
| 7 | 81.7% | 83.7% | $134.70 |
| 8 | 80.2% | 82.4% | $150.11 |
| 9 | 78.8% | 81.3% | $166.00 |
| 10 | 77.5% | 80.1% | $182.38 |
| 11 | 76.1% | 79.0% | $199.25 |
| 12 | 74.8% | 77.8% | $216.63 |
| 13 | 73.6% | 76.8% | $234.51 |
| 14 | 72.3% | 75.7% | $252.89 |
| 15 | 71.1% | 74.6% | $271.80 |
| 16 | 70.0% | 73.6% | $291.21 |
| Die | Count | Share that passes test | Bad among those passing | Chance all are good | TSV factor | Cost per die entering the stack |
|---|---|---|---|---|---|---|
| DRAM core die | 8 | 90.40% | 0.442% | 96.51% | 90.79% | $10.40 |
How it works
A stack or multi-die package is good only if every die, every through-silicon via, every bond and every assembly step is good, so the yields multiply and fall quickly with height. This tool compounds them, credits repair and rework, and works out the cost of a good stack including the good dies thrown away in failed ones.
- Dies that passed test. Each die type has a yield and a test escape rate: the share of bad dies that pass known-good-die test. Of the dies that pass, a small share are bad. Raising test coverage cuts the escape rate and so the bad share. An escape rate of 100% means no test. A stack needs every one of its dies good.
share passing = Y + (1 − Y) x escape; share good among those passing g = Y / (Y + (1 − Y) x escape); stack die factor = product of g^count over die types - Through-silicon vias. Thinning, via reveal and back-side processing can fail on a die that tested good. The TSV yield is per die and multiplies once for every die in the stack that has it. Dies without TSVs are 100%.
TSV factor = product of (TSV yield)^count over die types - Bond interfaces. Each interface between two dies, or between a die and the base die or interposer, bonds with a yield of its own, whether by thermal compression, mass reflow or hybrid bonding. A stack of N dies on a base has N interfaces; a bare stack has N − 1; chiplets side by side each make one attach.
bond factor = (bond yield per interface)^(interfaces) - Repair and redundancy. Spare lanes, redundant vias and spare rows can recover a share of the stacks that fail because of the die, via and bond steps. The recovered stacks are added back.
stack yield after repair = raw stack yield + (1 − raw stack yield) x repair share, where raw = die factor x TSV factor x bond factor - Base die, assembly and rework. The base die or interposer and final assembly each have their own yield, applied to the repaired stacks. One rework attempt then recovers a share of the failures: those that are eligible, times the rework success rate.
yield before rework = repaired yield x base yield x assembly yield; final yield = that + (1 − that) x eligible share x rework success - Cost of a good stack. Every stack started costs its dies (die cost plus test cost, spread over the dies that pass), the base die, assembly and any rework. Dividing by the final yield spreads the cost of failed stacks, including their good dies, over the good ones. The good dies scrapped is the good dies started per stack times (1 − yield) / yield.
cost per good stack = (sum of count x (die cost + test cost) / share passing + base cost + assembly cost + rework cost) / final yield - Bond yield needed. For a target final yield the tool solves for the bond yield per interface that reaches it with everything else unchanged. It reports that none is enough if the other steps already cap the yield below the target.
solve final yield(bond yield) = target for the bond yield
Assumptions
- Failures at each step are independent, so the yields multiply. Defects that cluster, or a bad bonding tool that spoils a whole batch, make real yield differ from the product.
- A stack of identical dies is the case the height sweep draws, repeating the first die type.
- Repair acts on die, via and bond failures, not on the base die or on assembly.
- A failed stack is scrapped with all its dies. Rework is one attempt at a stated success rate.
- Presets are editorial figures near published ranges. No public source gives per-step yield for a specific product.
Limits and warnings
- Published HBM yields are mostly press reports of overall or single-step figures; the per-step values here are assumptions that you should replace with line data.
- Wafer-to-wafer bonding stacks good and bad dies at random and so loses far more than the die-to-wafer or die-to-die flow modelled here, which stacks tested dies.
- Spare dies in a stack, partial-good stacks sold at a lower capacity and speed binning are not modelled; fold them into the repair share.
- Mid-stack test, known-good-stack test at each insertion and test escapes of the finished stack change the cost and are not modelled in detail.
- Yield learning over time is not included; the figures describe one point in a ramp.
Sources
The methods and default figures rest on these public sources. The wording here is our own; read the source for its full text.
- Test cost analysis for 3D die-to-wafer stacking (opens in a new tab), M. Taouil, S. Hamdioui, C. I. M. Beenakker and E. J. Marinissen, Proceedings of the 19th Asian Test Symposium, IEEE, pp. 435-441, December 2010. Cost and yield analysis of stacking tested dies.
- How FormFactor's Known Good Die Test Enables Advanced Packaging for High Bandwidth Memory (opens in a new tab), FormFactor, 14 March 2024. Why known-good-die test matters more as stacks grow taller.
- SK Hynix Revealed Progress for HBM3e, Achieving Nearly 80% Yield (opens in a new tab), TrendForce News, 24 May 2024. Reported overall yield near 80% and a TSV step reported at 40 to 60%, both second-hand press figures.
- HBM3e 12-Hi Faces Yield Learning Curve and Customer Validation Challenges, 2025 HBM Supply Outlook Remains Uncertain (opens in a new tab), TrendForce, 30 September 2024. The steep yield learning curve of 12-high stacks.
- SK hynix Reportedly Completes 12-High Hybrid Bonding HBM Validation, Raises Yields for Mass Production (opens in a new tab), TrendForce News, 29 April 2026. Hybrid bonding yields reported as improving; no figures disclosed.
Where it helps
The lifecycle stages this tool serves: 6 stages in 3 lifecycles.
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Method notev1Formula, ranges, sources and limits
Compounds die, test escape, TSV, bond, base die and assembly yields for a stack or multi-die package, credits repair and rework, and gives good stacks per 100 started and the cost per good stack.
Formula
share passing = Y + (1 − Y) x escape; share good among those passing g = Y / (Y + (1 − Y) x escape); stack die factor = product of g^count over die types; TSV factor = product of (TSV yield)^count over die types; bond factor = (bond yield per interface)^(interfaces); stack yield after repair = raw stack yield + (1 − raw stack yield) x repair share, where raw = die factor x TSV factor x bond factor; yield before rework = repaired yield x base yield x assembly yield; final yield = that + (1 − that) x eligible share x rework success; cost per good stack = (sum of count x (die cost + test cost) / share passing + base cost + assembly cost + rework cost) / final yield; solve final yield(bond yield) = target for the bond yield
| Input | Unit | Range it holds for | Comes from |
|---|---|---|---|
| Layout | choice | stack-on-base, stack-only, side-by-side | Your figure |
| Bond interfaces, 0 for automatic | interfaces | 0 to 128 | Your figure |
| Bond yield per interface | % | 50 to 100 | Your figure |
| Comparison bond yield per interface | % | 50 to 100 | Your figure |
| Share of die, via and bond failures recovered by repair | % | 0 to 100 | Your figure |
| Base die or interposer yield | % | 0 to 100 | Your figure |
| Base die or interposer cost | USD | from 0 | Your figure |
| Assembly yield | % | 0 to 100 | Your figure |
| Assembly cost per stack started | USD | from 0 | Your figure |
| Share of failures that can be reworked | % | 0 to 100 | Your figure |
| Rework success rate | % | 0 to 100 | Your figure |
| Cost of one rework attempt | USD | from 0 | Your figure |
| Target stack yield | % | 1 to 100 | Your figure |
Outputs: Stack yield before repair (fraction); Final stack yield (fraction); Good stacks per 100 started (stacks); Cost per good stack (USD); Bond yield per interface needed for the target (%).
Assumptions
- Failures at each step are independent, so the yields multiply. Defects that cluster, or a bad bonding tool that spoils a whole batch, make real yield differ from the product.
- A stack of identical dies is the case the height sweep draws, repeating the first die type.
- Repair acts on die, via and bond failures, not on the base die or on assembly.
- A failed stack is scrapped with all its dies. Rework is one attempt at a stated success rate.
- Presets are editorial figures near published ranges. No public source gives per-step yield for a specific product.
Uncertainty: The arithmetic is exact. The result is as good as the per-step yields entered, which have no public per-step source; with the editorial presets expect a real line to differ by ten points of yield either way.
Known limits
- Published HBM yields are mostly press reports of overall or single-step figures; the per-step values here are assumptions that you should replace with line data.
- Wafer-to-wafer bonding stacks good and bad dies at random and so loses far more than the die-to-wafer or die-to-die flow modelled here, which stacks tested dies.
- Spare dies in a stack, partial-good stacks sold at a lower capacity and speed binning are not modelled; fold them into the repair share.
- Mid-stack test, known-good-stack test at each insertion and test escapes of the finished stack change the cost and are not modelled in detail.
- Yield learning over time is not included; the figures describe one point in a ramp.
Where the method comes from
The Hub's own compound-yield arithmetic: independent step yields multiplied, with a known-good-die escape term, a repair share and a rework share. The presets are editorial figures placed near the yield ranges named in the sources.
Reference example, checked by test: Worked example in this method note: the HBM3 preset (8 DRAM dies at 90% yield, 4% test escape, 98.8% TSV yield, 99% bond yield on a base die), hand-worked in the tool's unit test. Stack yield before repair 0.808593; Final stack yield 0.802431; Good stacks per 100 started 80.2431; Cost per good stack 150.105; Bond yield per interface needed for the target 98.9438.
Versions
- v1 (2026-10-25): First version, built from the tool idea.
Terms on this page
- Yield
- The share of manufactured units that meet specification, counted at a given step: line yield through the fab, die yield at wafer sort, and assembly and final test yield after packaging.
- Die
- A single rectangular block of processed silicon cut from a finished wafer, carrying one complete circuit.
- Die yield
- The fraction of die on a wafer that pass electrical probe test, the headline yield number for a product.
- TSV
- A copper-filled vertical conductor etched through the body of a silicon die or interposer to carry signals and power from one face to the other.
- Test escape
- A defective device that passes the whole test flow and ships to a customer.
- Test coverage
- The fraction of testable faults detected, excluding faults proven undetectable by design from the denominator.
- Silicon
- The group IV element that carries almost all commercial semiconductor volume, valued for its abundance, its stable native oxide and a manufacturing base refined over sixty years.
- Base die
- The bottom die in a 3D stack, which carries through-silicon vias, the external interface and often power delivery and shared logic for the dice above.
- Hybrid bonding
- A bumpless interconnect that joins two surfaces by bonding their dielectric directly while embedded copper pads fuse during anneal.
- Chiplet
- A die designed to function only as part of a multi-die package, implementing a subset of a system such as compute cores, I/O or memory control.
- HBM
- A JEDEC standard DRAM built as a vertical stack of core dice on a base die, connected by through-silicon vias and presenting a very wide, relatively slow interface.
- WoW
- Bonding two full wafers face to face or face to back before dicing, so every die site on one wafer pairs with the site beneath it.
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