DUT (Device Under Test)

Notes

In multisite testing each site has its own DUT resources, which is what makes parallel testing economically attractive.

Overview

DUT (device under test) is the individual die, packaged part or assembly that a tester is exercising at a given moment. The term also labels the resources dedicated to that device, as in DUT power supply, DUT pin or DUT interface board. In semiconductor test a DUT may be a die on a wafer, contacted through a probe card, or a packaged chip held in a socket on a load board.

How it works

In production test the tester powers the DUT, applies stimulus and compares the responses with expected values to decide whether it passes and which bin it belongs in. The path between tester and DUT runs from instrument channels in the test head, through a DUT interface board (a load board or probe card) that routes signals and power, to a contactor: probe tips at wafer level or a socket for packaged parts. Every connection in that chain adds its own tolerance, so what the tester sees is the DUT plus the path to it.

With multisite testing, several DUTs are tested at once, each at its own site with its own tester resources. Semiconductor Engineering reports site counts from one, for some devices, up to about 4,000 for smart card dice at wafer test. Board routing, power distribution, probe planarity and chuck temperature can all make one site read differently from another, so engineers check that differences between DUTs are real before applying statistical outlier limits.

Pattern languages use the DUT as their reference point too: IEEE 1450 (STIL) defines the pattern, format and timing information needed to apply digital test vectors to a DUT.

Examples

• A load board with sixteen sockets, each a separate DUT site with its own power supplies and instrument channels.
• A DUT power supply measuring the current each device draws during a quiescent current test.
• A smart card wafer contacted at roughly 4,000 sites in a single touchdown.
• Site analysis showing that one DUT position on a probe card reads consistently higher leakage than the others.

Why it matters

Thinking per DUT is how test engineers budget tester resources, design load boards and probe cards, and judge measurement accuracy. Test programme developers, load board designers and wafer sort and final test engineers use the term constantly, and product engineers analyse results per DUT and per site.

In the chip lifecycle, the DUT is the focus at wafer sort, final test and system-level test in production, and during characterisation and qualification before release.

Related terms

• ATE
• Load board
• Multisite test
• Test socket
• Testbench
• UVM environment

Where it appears on the Hub

Used on 5 pages of the Hub. In each group, the pages that mention it most come first.