Process · Fab Ops, Yield & Metrology
Signature analysis
The classification of recurring spatial patterns in wafer maps, such as rings, centre spots, scratches or chamber-specific stripes, and their attribution to a particular tool, chamber or process step.
- Also known as
- Pattern recognition, Yield signature
- Type
- Process
- Domain
- Fab Ops, Yield & Metrology, Yield
Notes
Automated signature classifiers are now a standard machine-learning application in yield departments.
Overview
Signature analysis, in yield engineering, is the recognition and classification of recurring spatial patterns in wafer maps, such as edge rings, centre spots, scratches or repeating reticle patterns, and the tracing of each pattern back to the process step, tool or chamber that causes it. It turns pass and fail data from wafer test into clues about what went wrong in the fab. Because defects rarely fall on a wafer at random, the shape of a failure pattern is often the quickest pointer to its source.
How it works
The starting point is the wafer map: the result of electrical test, or of inspection, for every die position on the wafer. Many manufacturing effects leave a characteristic mark. Edge dies tend to yield lower than centre dies, spinning photoresist can create radial zones, uneven focus across a multi-die reticle can repeat the same failing pattern in every exposure field, and a scratch can leave a line of failing dies. A tool problem confined to one chamber shows up only on wafers that passed through it.
Classification has moved from engineers looking at maps by eye, to rule-based pattern detectors, to machine learning. Supervised models are trained on labelled maps of known pattern types, but labels are scarce and expensive, so semi-supervised methods that also learn from unlabelled maps are increasingly used. Clustering methods group maps with similar patterns without labels, and need to cope with maps that carry more than one pattern and with the same pattern appearing at different rotations. Public datasets of labelled maps, such as MixedWM38, support this research.
Attribution is the second half of the job. Engineers combine pattern classes with each wafer's processing history, including which tool and chamber it saw at each step, to find the common factor. The same spatial view supports test decisions too: a die that passes but sits in a cluster of failures may be screened out as a reliability risk.
Examples
- A ring of failing dies near the wafer edge on wafers from one etch chamber, leading engineers to inspect that chamber's edge hardware.
- The same small group of failing dies repeating in every exposure field, pointing to a reticle or focus problem rather than random defects.
- A machine learning classifier trained on a few labelled wafer maps plus many unlabelled ones, sorting new maps into known pattern types.
- A die that passes test but sits inside a cluster of failures being downgraded or scrapped as a reliability risk.
Related terms
Part of the Fab Ops, Yield & Metrology glossary, with every term in the topic and the lifecycles, tools and standards that use them.
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Skills
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Last reviewed . Written by The Semiconductor Hub editorial team. The full glossary