Silicon wafer

Notes

Five suppliers, led by Shin-Etsu and SUMCO, account for the great majority of world merchant wafer supply.

Overview

A silicon wafer, in the sense used when buying and qualifying substrates, is a slice of single-crystal silicon made and delivered to a written specification covering how the crystal was grown, its doping and resistivity, its crystal orientation, its dimensions and flatness, and its surface quality. Fabs and suppliers agree these properties in advance, usually by reference to SEMI standards. The general idea of the wafer as the unit a fab processes is covered on the wafer page; this page is about what goes into the specification.

How it works

The specification starts with the crystal. Most silicon is grown by the Czochralski (CZ) method, in which a seed is pulled from silicon melted in a quartz crucible with dopants such as boron, phosphorus, arsenic or antimony added to the melt. The float zone (FZ) method melts a polycrystalline rod locally with a radio frequency coil and needs no crucible; Siltronic notes that FZ crystals suit power devices such as IGBTs. The dopant sets the conductivity type and resistivity, and the cooling profile of the crystal also matters.

SEMI M1 is the base specification for polished wafers. It covers ordering information and requirements for electronic grade, single crystal wafers with at least one chemically and mechanically polished surface, and tabulates dimensional requirements for many wafer categories, including thickness, total thickness variation, bow and warp. Properties are checked with agreed test methods that M1 references, for example for crystal orientation, four-point probe resistivity and automated flatness measurement.

M1 applies to prime wafers, the grade used to make products. Other grades have their own documents: SEMI M8 covers test wafers in classes, SEMI M24 covers premium wafers for demanding monitoring jobs such as particle counting, and reclaimed wafers are covered elsewhere. Special starting materials add a second layer of specification on top of the M1 substrate: SEMI M62 for epitaxial wafers, which carry a freshly deposited single-crystal layer with its own properties, and SEMI M71 for silicon-on-insulator wafers for CMOS.

Examples

• A 300 mm prime CZ wafer ordered to SEMI M1 with stated resistivity, orientation and flatness limits for a logic process.
• Float zone wafers chosen for IGBT power devices, where Siltronic recommends FZ crystal.
• A 300 mm epitaxial wafer, specified under SEMI M62, used for integrated circuits or image sensors.
• A thin-film silicon-on-insulator wafer specified under SEMI M71 for a CMOS process.

Related terms

• CZ
• Epitaxial wafer
• SOI

Where it appears on the Hub

Used on 6 pages of the Hub. In each group, the pages that mention it most come first.