Ramp

Notes

A node that ramps six months late can miss an entire product cycle for its lead customer.

Overview

A ramp is the period in which a new fab, process node or product rises from its first production wafers to full volume, with yield, cycle time and equipment utilisation all improving along the way. How quickly a manufacturer ramps decides when it can sell in volume and at what cost, so ramp speed is a key competitive and financial measure.

How it works

At the start of a ramp, few wafers are running and yields are low, because the process still has defect sources and variability that only show up at volume, and because tools and people are still learning. Engineers run yield learning cycles: they collect inline inspection, metrology and test data, find the biggest causes of loss, fix them and confirm the improvement on later lots. Each cycle takes as long as it takes wafers to go through the fab, so shortening cycle time speeds learning.

Volume rises as yield and confidence improve. More tools are qualified and released, more products are introduced, and wafer starts are increased towards capacity. Fabs that copy a process from an existing site try to match it exactly, so that its yield learning transfers directly.

New designs on a mature process have their own, shorter ramps, because design-specific systematic issues still need to be found. Data analytics and diagnosis tools that combine design, test and fab data are increasingly used to find yield limiters faster, especially at advanced nodes where defects are harder to see.

Examples

• A new process node ramping over a year from risk production to high volume as defect density falls.
• A second fab copying a process exactly from the first so that it ramps on proven settings.
• A new SoC on a mature node whose early yield is held back by one layout pattern that prints poorly.
• Using volume scan diagnosis to find a systematic defect during the ramp of a 5nm product.

Why it matters

Leading-edge fabs cost tens of billions of dollars, so months saved in a ramp are worth a great deal, and a slow ramp can cost a product its market window. Yield engineers, process integration engineers, technology ramp managers, fab operations and capacity planners drive it, and analysts watch ramp announcements as signals of a manufacturer's competitiveness.

In the chip lifecycle the ramp follows technology qualification or product release and ends when output and yield reach their mature levels.

It matters most to: Process Integration Engineer, Scan Diagnosis & Yield Ramp Engineer, Technology Ramp Program Manager, Yield Enhancement Engineer

Common confusions

Not the same as NPI

New product introduction covers getting a product ready for production, including qualification and documentation. The ramp is the volume and yield rise once production starts. Ramp vs NPI

Not the same as capacity expansion

Adding tools or fab space increases potential output. A ramp is about bringing a new process or product up to its yield and volume targets.

Sources

1. How To Improve Yield Ramp For New Designs And Technology Nodes (Jayant D'Souza, 8 November 2022) (opens in a new tab), Semiconductor Engineering, 2026-10-22
2. Strategies For Faster Yield Ramps On 5nm Chips (Laura Peters, 12 April 2022) (opens in a new tab), Semiconductor Engineering, 2026-10-22
3. Yield Management System (YMS) (Knowledge Center) (opens in a new tab), Semiconductor Engineering, 2026-10-22
4. Ramp-up (Wikipedia) (opens in a new tab), Wikimedia Foundation, 2026-10-22

Related terms

• Yield learning
• Capacity utilisation
• Copy exact
• Greenfield fab
• PRQ
• Wright's Law

Where it appears on the Hub

Used on 44 pages of the Hub. In each group, the pages that mention it most come first.