Acronym · Design & Architecture
IP (Intellectual Property)
Intellectual property (IP). In chip design it usually means a reusable, pre-designed and verified block, such as a processor core, a memory controller or a SerDes, that a company licenses or builds once and integrates into many chips.
It also covers the legal rights in designs, patents and software that licences and contracts protect.
- Also known as
- Intellectual property
- Type
- Acronym
- Domain
- Design & Architecture, IP and reuse
Overview
In chip design, IP (intellectual property) most often means a pre-designed, pre-verified circuit block, such as a processor core, a USB or PCIe interface, or a memory controller, that is licensed or reused so a team does not have to design it from scratch. It is called IP because what changes hands is the right to use someone's protected design rather than a physical part. The same abbreviation also covers patents, copyright and other legal rights, so context decides which is meant.
How it works
Soft IP is delivered as synthesisable RTL (or sometimes a gate-level netlist), so the integrating team synthesises and lays it out for whichever process it uses. Hard IP is delivered as finished layout for one specific process; analogue and mixed-signal blocks such as SerDes PHYs, PLLs and data converters are usually hard, because their performance depends on exact transistor layout, and they cannot simply be moved to another foundry.
A block is more than its design files. It comes with documentation and with the models and views other teams need to verify it and build it into a chip. The IP-XACT standard (IEEE 1685) gives a common way to describe and package blocks so that tools can integrate and reuse them.
Commercial terms vary from licence to licence. Arm, for example, offers several licensing models, including one in which licence fees fall due only when a design tapes out. Foundries offer hard IP blocks built for their own processes, which helps tie a design to that foundry.
Examples
- An SoC that licenses Arm processor cores and adds its own accelerators around them.
- A PCI Express or DRAM controller, with its PHY, licensed from an IP vendor rather than designed in-house.
- Hard IP blocks that a foundry offers for its own process.
- An open-source RISC-V core, published as RTL, adapted and reused inside a microcontroller.
- A company reusing its own proven video codec block across several product generations.
Why it matters
Reusing IP is how modern SoCs are built on time: most of a large chip is assembled from blocks rather than drawn fresh. Architects decide what to buy and what to build, IP integration engineers make blocks fit, and legal and licensing teams manage the contracts and royalties.
In the chip lifecycle, IP choices are made during architecture, blocks are integrated and verified during design, licence terms may continue to apply for every chip shipped in production, and IP quality issues often surface at bring-up.
Related terms
Part of the Design & Architecture glossary, with every term in the topic and the lifecycles, tools and standards that use them.
Where it appears on the Hub
Used on 419 pages of the Hub. In each group, the pages that mention it most come first.
Lifecycle stages and gates
Roles
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Last reviewed . Written by The Semiconductor Hub editorial team. The full glossary