Design & IP

Some context: Argo is my PicoRV32 + 8x8 systolic array SoC on IHP SG13CMOS5L (posted here a few weeks ago https://www.reddit.com/r/chipdesign/comments/1wzfdef/i_designed_a_riscv_chip_with_a_matrix_acc…
6th-gen M-series silicon promises more cores, faster memory, a fatter NPU, and better connectivity, now in more form factors

Researchers at IBM Research Europe published “Superposed analog memory for vector storage in neural networks.” Summary: Researchers demonstrated an analog phase-change memory architecture that stores…

6th Gen AMD EPYC processors will power OCI Compute E7 instances, while AMD Pensando technology provides the foundation for Oracle Acceleron converged NICs for AMD compute and accelerator instances on…

NVIDIA and Oracle today announced plans to expand Oracle Cloud Infrastructure (OCI) Superclusters with NVIDIA Vera Rubin NVL72 systems to multi-gigawatt scale, supporting growing customer demand for A…

For decades, semiconductor sustainability was treated largely as a chip design problem: better performance per watt, specialized accelerators and smarter power management. With the AI build-out drivin…

The modular Keybytes project combines a Keyword hub that is magnetically connected to Keybit keys, with each key having its own microcontroller.

A massive $750 discount at Walmart brings the price of MSI's Crosshair gaming laptop crashing down. RTX 5060 graphics and a bright 240Hz IPS display are just two of the standout features of this lapto…

S2C showcased FPGA prototyping and AI-assisted debugging at the sixth RISC-V Summit China, outlining how developers can validate complex processor designs and begin software development before first s…