Chip lifecycle / Checklists / FPGA chip lifecycle / Silicon Bring-up & Characterisation: entry checklist

Silicon Bring-up & Characterisation: entry checklist

Starts bring-up and characterisation when packaged first silicon arrives. The bring-up lead runs it with the characterisation lead.

1. Readiness

MustPackaged first silicon is received, with its lot and wafer records.
Evidence
First packaged parts
Owner
Foundry interface manager
MustBring-up boards are built and checked without silicon.
Evidence
Board check record
Owner
Silicon bring-up engineer
MustBring-up designs and bitstreams are built with the pinned software and checked on the device model.
Evidence
Bring-up design set
Owner
Applications engineer

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