Checks that the device configures from every source, the hard IP is brought up, errata are documented and characterisation is complete before the designs running and silicon characterised gates. Owned by the bring-up lead and the characterisation lead.
MustThe device configures from each supported source, including encrypted and authenticated bitstreams.
MustThe bring-up designs run with correct results, compared with their configured design simulations.
MustEvery hard IP block is brought up, with link and interface results recorded.
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