AMS Specification & Architecture

Stages

1. AMS Specification & Architecture (this stage)^A
2. Schematic & Circuit Design^D
3. AMS Verification^A

Product milestones

• Concept approval (CA)

Circuit milestones

• TR1: Process and device readiness (PTR) (technical readiness review TR1)
• AMS specification freeze (ASF)
• Schematic design review (SDR)
• Pre-layout verification complete (PVS)

Disciplines

• AMS architecture and specification^AAO
  • AMS Specification & Architecture: maturity 0.3, Sketched. Performance targets, topology, budgets and process options shown feasible at the readiness review and frozen at the specification freeze; later changes go through change control.^AAO; Architecture freeze (milestone for one item)
  • Schematic & Circuit Design: maturity 0.5, Draft. Specification clarified against the schematic review and the verification results, with every change controlled.
  • AMS Verification: maturity 0.5, Draft. Specification clarified against the schematic review and the verification results, with every change controlled.
• Analog circuit design^DAO
  • AMS Specification & Architecture: maturity 0.3, Sketched. Topology chosen with hand calculations, and the critical circuits shown feasible on the target process.
  • Schematic & Circuit Design: maturity 0.5, Draft. Schematics sized and simulated at nominal conditions and the main corners, reviewed at the schematic design review, then corrected from the corner runs until released to layout.^D
• RF and millimetre-wave design^A
  • AMS Specification & Architecture: maturity 0.3, Sketched. RF link budget and front-end architecture set, with the critical blocks shown feasible.
  • Schematic & Circuit Design: maturity 0.5, Draft. RF schematics sized and simulated across corners, with first electromagnetic models of inductors and key interconnect.^A
  • AMS Verification: maturity 0.5, Draft. RF schematics sized and simulated across corners, with first electromagnetic models of inductors and key interconnect.
• Process, devices and design kit^AAO
  • AMS Specification & Architecture: maturity 0.3, Sketched. Process and devices chosen, with the device models assessed for the critical circuits.^A
  • Schematic & Circuit Design: maturity 0.5, Draft. Device models and design kit released for schematic design at the schematic review.
• AMS verification^AA
  • AMS Specification & Architecture: maturity 0.0, Specified. Verification approach, corners and statistical targets agreed from the specification.
  • Schematic & Circuit Design: maturity 0.3, Sketched. Verification plan final at the schematic review; test benches and first behavioural models built.^D
  • AMS Verification: maturity 0.5, Draft. Corner and Monte Carlo results within specification or waived, behavioural models checked against the circuit and mixed-signal checks passed: pre-layout verification signed off.
• Custom layout^DA
  • AMS Specification & Architecture: maturity 0.0, Specified. Block area and layout effort estimated with the circuit designers from the chosen topology, with the matching and isolation needs noted; nothing drawn yet.
  • Schematic & Circuit Design: maturity 0.3, Sketched. Floorplan drafted from the reviewed schematics, with matched groups and sensitive signals identified.^A
  • AMS Verification: maturity 0.5, Draft. Floorplan agreed, with matched devices, guard rings and sensitive routes placed; full layout starts from the schematics released to layout.
• Extraction, reliability and ESD checks^AA
  • AMS Specification & Architecture: maturity 0.0, Specified. ESD and reliability approach agreed from the specification.
  • Schematic & Circuit Design: maturity 0.3, Sketched. ESD protection plan final at the schematic review, with the reliability rules for the circuit.
  • AMS Verification: maturity 0.5, Draft. Extraction, electromigration, IR drop and ESD checks set up and tried on the floorplan.
• Integration and hand-off^DA
  • AMS Specification & Architecture: maturity 0.0, Specified. Target chip, delivery form and hand-off date agreed with the integrating team, with the views and models it will need listed; no interface defined yet.
  • Schematic & Circuit Design: maturity 0.3, Sketched. Interface and pin definition agreed with the chip the block goes into.
  • AMS Verification: maturity 0.5, Draft. Behavioural model and pin-out shared with integrators for early chip simulation.
• Silicon characterisation^A
  • AMS Verification: maturity 0.0, Specified. Characterisation owner named, with the bench equipment, conditions and sample numbers scoped from the specification and the verification plan; test points not yet defined.
• AMS product management^DO
  • AMS Specification & Architecture: maturity 0.3, Sketched. Business case and product requirements approved, with requirements tracked against the design.^O
  • Schematic & Circuit Design: maturity 0.3, Sketched. Business case and product requirements approved, with requirements tracked against the design.
  • AMS Verification: maturity 0.5, Draft. Requirements confirmed against the verified circuit; lead customers engaged.