Reference flow

Notes

TSMC popularised the concept in the early 2000s, and each new node now ships reference flows for the major vendors.

Overview

A reference flow is a documented, tested recipe for designing chips on a particular process with particular EDA tools, published by a foundry, usually with its EDA partners, so that customers do not have to work out the methodology from scratch. It sets out which tools to use at each step, with scripts, settings and checks tuned to the process. TSMC, for example, describes its reference flows as putting its design methodology into practice with EDA tools that it certifies for each node.

How it works

A new process brings new physical effects and rules, such as tighter routing restrictions, new variation behaviour or new power delivery features. The foundry's design technology team works with EDA vendors so that each tool supports what the process needs, and certifies the tools against the process requirements. A reference flow goes a step further: it strings certified tools together into a complete methodology for one style of design, with recommended commands, settings, checks and handoffs between steps.

Flows are usually split by design style. TSMC's EDA Alliance page lists digital flows for synthesis, placement and routing on its A14 node for mobile and high-performance designs, a custom flow for transistor-level design and verification, flows for migrating analogue and RF designs between nodes, and a flow for 3D designs using its 3DFabric technologies. Detailed material is delivered through the foundry's customer portal rather than published openly. TSMC used to number its releases; its Reference Flow 12.0 in 2011, for example, added support for 2.5D and 3D ICs.

EDA vendors also publish reference flows for their own tools as a starting point that customers adapt. Either way, a reference flow is a baseline: real projects add their own constraints, IP and checks, and signoff still relies on the foundry's official rule decks and models.

Examples

• TSMC's A14 mobile and high-performance computing flows for synthesis, placement and routing using its gate-all-around methodology.
• TSMC's Reference Flow 12.0 and AMS Reference Flow 2.0, presented with ecosystem partners at the Design Automation Conference in 2011.
• Synopsys digital and analogue flows certified by TSMC for the A16 and N2P processes, announced in April 2025.
• Mentor's Nitro Reference Flow, a vendor-supplied set of Tcl scripts and setup files for its Nitro-SoC place and route tool that customers adapt.

Why it matters

Reference flows matter most to teams adopting a new node, to smaller companies without a large methodology group, and to the CAD and design enablement engineers who build their company's internal flow on top of them. They shorten the time to a first working design and lower the risk of missing a process requirement that would otherwise surface only in silicon.

Related terms

• PDK
• RTL-to-GDSII
• Signoff
• Foundry

Where it appears on the Hub

Used on 15 pages of the Hub. In each group, the pages that mention it most come first.