IP-XACT

Notes

Originated in the SPIRIT consortium and is most valuable to teams assembling large SoCs from many reused blocks.

Overview

IP-XACT is an IEEE standard, IEEE 1685, that defines an XML format for describing electronic design components, such as IP blocks with their interfaces, register maps, parameters and files, together with how those components are connected into a system. Because the description is tool-neutral, one IP-XACT database can drive SoC assembly, register header generation, verification set-up and documentation in tools from different vendors. It holds metadata about a design; it does not contain or replace the RTL itself.

How it works

An IP-XACT component description lists a block's ports, its bus interfaces, defined against standard bus descriptions, its configurable parameters, the files that implement it in each view, and its memory maps, broken down into address blocks, registers and bit fields. A design description instantiates components and records how their interfaces connect, and a design configuration chooses views and parameter values. The standard comes with XML schemas and semantic consistency rules, so tools can check that descriptions are complete and coherent.

Generators are the payoff. Tools read the IP-XACT data and produce top-level wiring RTL, register headers for software, register models for verification and register documentation, so hardware, software and verification teams work from one source and a change flows to every output. The standard also defines an interface through which generators query the data, which makes them portable across tool environments.

IP-XACT began at the SPIRIT Consortium and was first published by the IEEE as 1685-2009. The current edition is IEEE 1685-2022, which replaced the 2014 version, and Accellera's IP-XACT working group publishes supporting material, including XML schema files, recommended vendor extensions, a user guide and a worked example design.

Examples

• An IP vendor shipping a USB controller with an IP-XACT component file listing its ports, bus interfaces and registers.
• An SoC team generating the top-level connections between processors, interconnect and peripherals from an IP-XACT design description.
• A register map held in IP-XACT from which C headers, verification register models and a programmer's reference are all generated.
• Accellera's Leon2 example, published with the standard's supplemental material, used to learn how components, bus interfaces and memory maps are described.

Why it matters

SoC integration engineers, register map specialists and IP providers use IP-XACT to cut the manual effort and errors involved in wiring together hundreds of blocks and keeping register descriptions consistent. When an IP supplier ships IP-XACT files with a block, the customer can import it straight into integration and register tools.

Related terms

• SoC integration
• Register map
• Design data management
• Bus interface
• CSR
• Design reuse

Where it appears on the Hub

Used on 21 pages of the Hub. In each group, the pages that mention it most come first.