725 abbreviations with 1,246 meanings, from the gate and discipline codes on the lifecycle charts to the standards, bodies and industry terms the Hub uses. Where the same letters mean different things, each meaning is listed with the lifecycles that use it. The list is built from the lifecycle and compliance data, so it stays current. For definitions of terms in general, see the glossary.
Runs corner and Monte Carlo simulation against the specification, builds behavioural models, and checks the circuit together with the digital logic around it.
Discipline codes
In: AMS lifecycle
Develops the modules that stack or bridge dies: interposer and bridge fabrication, through-silicon vias, temporary bonding, thinning and debonding, micro-bumps, and die-to-wafer or wafer-to-wafer hybrid bonding with its surface preparation and alignment.
Discipline codes
The chip has been measured against its specification on the bench, with any differences listed as errata.
Gate codes
The macro has been measured against its specification across voltage, temperature and process corners, the views are correlated with silicon, and every difference is listed as errata.
Gate codes
The product meets its requirements in system testing and has passed the compliance tests its market requires.
Gate codes
Product silicon has been brought up on the evaluation board and checked against the silicon validation plan, with firmware running and the known issues written down, so the company knows what its samples can and cannot do before they ship.
Gate codes
Brings up first silicon, validates function and performance over temperature and voltage, characterises the parameters radiation will shift, and publishes the errata.
Discipline codes
In: Space lifecycle
Plans and runs the verification that proves the security requirements: formal security properties, negative and abuse case tests, fault injection simulation and firmware security tests, with traceability from every threat to the tests that cover it.
Discipline codes
Owns the software verification plan, reviews and analyses of requirements, design and code, requirements-based and robustness tests on the target, structural coverage analysis and the software verification results.
Discipline codes
Tests the whole product against its requirements, and runs electromagnetic compatibility, safety and other compliance tests.
Discipline codes
In: FPGA lifecycle
Verifies the design against its hardware safety requirements, runs fault injection campaigns to measure diagnostic coverage, and keeps every requirement traced to its evidence.
Discipline codes
Functional verification of the hardware design is closed against its plan, every hardware safety requirement is verified and the diagnostic coverage claimed in the FMEDA is confirmed by fault injection.
Gate codes
A vertical connection through a silicon die, used to stack dies and in interposers.
Manufacturing, test and packaging
Used in: Package technology lifecycle: Interposer, TSV and hybrid bonding
Gate and discipline codes are plain initials chosen for the Hub's charts, not any company's internal codes. Standard names belong to their publishers; the guides explain them in our own words. Missing an abbreviation? Suggest one.