A living catalogue: interactive time-series, sourced references, a daily point-in-time ledger and event streams: every dataset queryable by people and by agents through one JSON/CSV API. Coverage windows, headline values and movements below are computed from the rows themselves, never typed in.
Industry data, not investment advice. Corrections are listed in the corrections changelog.
isSampleData flag in the API. The remaining 42 hold real figures: published prints, each naming and linking its source, or the platform's own live aggregates.44 datasets across interactive time-series, sourced reference pages, ledger domains, tool-embedded datasets, series accumulating now: filter by kind, topic, tier or access surface.
Worldwide installed wafer capacity at 7nm and below, in thousands of wafers per month, for 2024 to 2028 as forecast by SEMI, with SEMI's bounds for 2nm and below. The fab explorer carries the per-fab detail.
Estimated cost to manufacture each vendor's flagship data-centre accelerator as new generations ship: logic die, HBM, advanced packaging, packaging yield loss and auxiliary parts. Epoch AI's bill-of-materials model supplies the vendor series; Raymond James estimates for the NVIDIA H100 and B200 are shown as a second view.
Estimated manufacturing cost per chip for the accelerators in the directory, from Epoch AI's bill-of-materials model: median with 5th and 95th percentile bounds. The model covers logic die, HBM, CoWoS packaging, packaging yield loss and auxiliary parts. Raymond James estimates for H100 and B200 are shown alongside.
Per-accelerator foundry, process node, die count, packaging and HBM details as disclosed by the chip vendors, with named third-party sources where the vendor is silent.
Named analyst estimates of what buyers pay for 8-GPU H100 servers and GB200 NVL36 and NVL72 racks, with and without networking and storage.
Reported quarterly gross margin for the leading AI GPU vendor (NVIDIA), two CPU and GPU vendors (AMD, Intel) and the leading foundry (TSMC), from each company's earnings release.
International Business Strategies (IBS) estimates of the average cost to design a chip at each node, as quoted in SEC filings and Semiconductor Engineering between 2018 and 2024. Each node is a series; each point is the estimate as published on that date.
Published per-GPU-hour rental prices for H100, H200, B200, GB200 and A100 at Lambda, Runpod, CoreWeave and AWS, recorded as of the date each price was checked.
Dated weekly spot prints for the DDR4 8Gb (1Gx8) chip and the 512Gb TLC NAND wafer from TrendForce, held as a ledger so each published print can be looked up by date.
Monthly CoWoS 2.5D packaging capacity at TSMC, in wafers per month, from mid-2023 with reported targets to the end of 2028, plus ASE's reported CoWoS-class target for the end of 2025.
Hand-curated HBM contract prints that do not fit a regular feed: reported per-stack prices for 12-high HBM3E and HBM4 and the reported HBM3E price per gigabit, each held at the value of its latest print.
Weekly average spot price of the mainstream DDR4 8Gb (1Gx8) 3200MT/s chip as published by TrendForce, February to October 2026, as a commodity-memory read-across to HBM tightness.
Dated site announcements, ground-breakings, tool move-ins, production starts and schedule slips for new fabs and packaging plants in the US, Japan and Germany, as companies and the press disclosed them.
The catalogue's own scenario projections, frozen as write-once vintage rows on the 2nd of each month and graded once they mature — a public record of our own hit rate.
Published third-party forecasts of the semiconductor market, kept as the vintage they were, so each can be compared with later vintages and with the outcome.
Illustrative booking-to-delivery lead time across leading-edge, mature, advanced-packaging and HBM capacity — the quarterly curve behind the allocation dashboard.
Reported monthly wafer capacity at TSMC for 3nm, 2nm and CoWoS packaging, as dated points from Taiwanese trade press, from 2024 to reported targets for 2027 and 2028.
UMC's reported fab capacity utilization rate each quarter since Q1 2022, from its quarterly results releases, plus its guidance for the current quarter. It traces the 2022 full-capacity period, the 2023 to 2024 trough and the recovery since 2025.
Quarterly figures foundries publish in their earnings releases: TSMC's share of wafer revenue by node (2nm, 3nm, 5nm, 7nm) and gross margin, and SMIC's capacity utilization. Published quarters are not revised.
Reported 300mm wafer price at the leading nodes of TSMC, Samsung Foundry, Intel Foundry and Rapidus, as published in trade press between late 2025 and mid 2026.
Published on-demand rental price per GPU-hour divided by NVIDIA's published FP8 Tensor Core throughput for the rented GPU, giving the hourly cost of one petaFLOP of FP8 capacity across H100, H200, B200 and GB200.
Dated asking-price readings for used and refurbished previous-generation accelerators, as published by GPU pricing data firms: a read on how fast the installed base is depreciating.
Published on-demand rental price for one NVIDIA H100 SXM GPU per hour at Lambda, Runpod, CoreWeave and AWS, recorded on the dates each provider published or changed it, from August 2023.
Reported HBM contract prices by generation: per-stack prices for 12-high HBM3E and HBM4 supplied by SK hynix to Nvidia, the reported HBM3E price per gigabit, and TrendForce's HBM-to-DDR5 price multiple.
HBM leading indicators and market size retired when the HBM reference set superseded them: HBM share of DRAM revenue and bit output from TrendForce, and HBM market size estimates from Micron and Goldman Sachs. Frozen history, still queryable.
HBM market share of SK hynix, Samsung and Micron: TrendForce's 2022 estimate and 2023 forecast, and Counterpoint Research quarterly shares from Q2 2025 to Q2 2026.
Reported per-stack contract prices for 12-high HBM3E and HBM4, JEDEC and supplier specifications by generation (per-pin speed, bandwidth and capacity per stack), and HBM capacity of selected accelerators.
Quarterly capital expenditure reported by Microsoft, Alphabet, Amazon and Meta, the demand side of accelerator and data centre spending, with Alphabet's and Meta's stated 2026 outlook.
Average retail price of electricity to industrial customers in the US and in five states with large datacentre build-outs (Georgia, Oregon, Arizona, Virginia, Texas), from the US Energy Information Administration. This is the power-cost input used by the frontier tool's power-and-cooling metric.
Published input and output list price per million tokens for the flagship and small model lines of Anthropic, OpenAI and Google. Prices stated in dated announcements or changelogs are recorded on that date; prices taken only from a current pricing page are recorded on the date the page was read.
Hosted-model list prices per million input and output tokens for the current Claude, OpenAI GPT and Gemini Flash lines. Prices stated in dated announcements or changelogs are recorded on that date; prices taken only from a current pricing page are recorded on the date the page was read.
Weekly average spot quotation for 512Gb TLC NAND wafers as published by TrendForce, February to October 2026.
The sourced inputs behind the frontier tool: vendor-published peak BF16 throughput for each directory accelerator and Epoch AI's estimated manufacturing cost. The tool plots cost against throughput; its other cost metrics (market price, rental, operating cost) remain user assumptions.
Published reference inputs for the chip cost calculators: a leading-node defect density disclosed by Intel, IBS chip design costs at 3nm and 2nm, and Epoch AI's modelled CoWoS-L packaging cost per NVIDIA B200.
Annual capital expenditure for TSMC, the largest pure-play foundry, and Micron, a leading memory maker, with TSMC's stated guidance for 2026.
Average time between ordering a chip and taking delivery, in weeks, from Susquehanna Financial Group's monthly lead-time research as reported in the press, from 2021.
Reported 300mm wafer price at TSMC for each leading node around its introduction, from 90nm in 2004 to A16 in the second half of 2026. TSMC does not publish prices, so every value is a press-reported estimate.
Published concentration figures for single-country or single-region dependencies in the chip supply chain: EUV lithography and optics, resists, specialist tools, leading-edge logic, foundry, packaging and testing, memory and gallium.
Dated government actions touching semiconductor trade: US export-control rules, CHIPS Act awards, tariff and investment actions, China's export restrictions and suspensions, and Dutch, Japanese and EU measures, as published.
Companies in the Hub directory whose profile has been claimed and verified by a representative of that company.
Dated reports of TSMC 300mm wafer prices by node class (N7, N5, N3, N2). TSMC does not publish prices, so each point is a press-reported estimate or a published cost model, held at the date it describes.
One reference 300mm wafer price per TSMC node, 28nm to 2nm: CSET's modelled 2020 foundry sale price for 28nm to 5nm, and reported 2025 prices for 3nm and 2nm.
Quarterly equipment revenue, bookings and backlog as reported by ASML, Applied Materials, Lam Research, KLA and Tokyo Electron, a leading indicator for fab capacity.
Organisation-level workforce reduction and expansion events recorded by Workforce Watch (NEWS-19), excluding rumoured/unpublished entries.
14 REST endpoints · CSV for every dataset · a machine-readable contract per dataset · OpenAPI 3.0
HBM, wafer and capacity movements each week: dated, labelled, human-reviewed. One short email, only when the data moves.
Latest values, what moved, the daily ledger and the depth of every series are for registered members. Registration is free and takes a minute. You come back to this page afterwards.