Skip to main content
THE SEMICONDUCTOR HUB
Chip Economics / Supply chain explorer

Supply Chain Explorer

Chokepoints in the semiconductor supply chain: single- or few-supplier dependencies, grouped by category and ordered by a defined severity band. What the bands mean

What this register covers, and what it does not

Dependencies register build state: Demonstration. 10 of 11 records are still samples that no editor has checked against public sources; every figure on them is labelled. How build states work

Known gaps (7)
  • No dependency recorded in the value chain at: Design software and IP
  • No dependency recorded in the value chain at: Equipment
  • No dependency recorded in the value chain at: Wafer fabrication
  • No dependency recorded in the value chain at: Memory
  • No dependency recorded in the value chain at: Assembly, test and packaging
  • No dependency recorded in the value chain at: Substrates and components
  • 10 of 11 dependencies not yet placed in the value chain
Co-packaged / near-package optics: LOWArF immersion lithography systems: MEDIUMEUV lithography systems: CRITICALEUV projection optics: HIGH300mm silicon wafers: MEDIUMEUV & ArF photoresist: HIGHSilicon carbide substrates: MEDIUMTungsten for interconnect & materials: MEDIUMHBM DRAM supply: CRITICALCoWoS advanced packaging capacity: CRITICALABF build-up film substrates: HIGH11chokepoints
By severity (outer ring)
CRITICAL (3)
HIGH (3)
MEDIUM (4)
LOW (1)
By category (inner ring)
Interconnect (1)
Lithography (2)
Lithography components (1)
Materials (4)
Memory (1)
Packaging capacity (1)
Packaging materials (1)

Where the value chain sits

The chokepoints below are single steps. Across the whole chain, the picture by region looks like this:

  • No region dominates any step of the chip value chain, with one exception: pure-play foundry, which is concentrated in Asia. Design, equipment, materials, front-end manufacturing and assembly and test are each spread across several regions.
    Source: McKinsey on Semiconductors, No. 9, March 2024, pp. 17 to 18. Primary source named in the report: Gartner.

Work in progressA region-by-step breakdown from the primary data is not yet published here. Suggest a source or a correction

Facts restated in our own words from McKinsey on Semiconductors, No. 9, March 2024, with the printed page. Forecasts are labelled as such and are the report's, not the Hub's. Where the report names a primary source, that source is the authority: check it before relying on a figure.

Interconnect

Co-packaged / near-package opticsSeverity: LowSample
Optical interconnect for next-generation AI clusters depends on an emerging, still-consolidating supplier base for photonic engines and packaging.
Countries
United States / Taiwan

Lithography

EUV lithography systemsSeverity: CriticalSample
High-NA and standard EUV scanners are sourced from a single supplier; every leading-edge logic and DRAM roadmap below ~7nm depends on this equipment.
Countries
Netherlands
Companies exposed
TSMCSamsung Foundry (not yet linked)Intel FoundrySK hynixMicron (not yet linked)
ArF immersion lithography systemsSeverity: MediumSample
Mature and mid-node immersion lithography tools come from two suppliers, a shallower but still real chokepoint than EUV.
Countries
Netherlands / Japan
Companies exposed
TSMCSamsung Foundry (not yet linked)UMCGlobalFoundries

Lithography components

EUV projection opticsSeverity: HighSample
The mirror assemblies inside EUV scanners are supplied by one optics house, making them a dependency one layer beneath the scanner itself.
Countries
Germany
Companies exposed
ASML

Materials

EUV & ArF photoresistSeverity: HighSample
A small number of Japanese chemical makers supply the bulk of advanced-node photoresist used industry-wide.
Countries
Japan
Companies exposed
TSMCSamsung Foundry (not yet linked)SK hynix
300mm silicon wafersSeverity: MediumSample
Polished silicon wafer supply is concentrated among a handful of Japanese and one Taiwanese producer.
Countries
Japan
Companies exposed
TSMCSamsung Foundry (not yet linked)Intel FoundrySMIC
Silicon carbide substratesSeverity: Medium
Single-crystal silicon carbide wafers on which SiC power devices are built, chiefly MOSFETs for electric-vehicle inverters. Supply is concentrated: the two largest suppliers hold about 60 to 65 percent of the SiC market, and integration from substrate to device is linked to yields 5 to 10 points higher and margins 10 to 15 points higher.Source: McKinsey on Semiconductors, No. 9, March 2024, pp. 46-49 (primary for market shares: Yole, Power SiC 2023) (opens in a new tab), ; may be out of date
Material
Silicon carbide (SiC) substrates
Value chain
Materials and chemicalsEditorial assessment, : Placed under materials: a substrate the device maker buys or grows before device fabrication.
Countries
Unsourced, work in progress
Current state
Wafer sizes are moving from 6-inch to 8-inch from 2024 to 2025, with about half of wafers expected at 8-inch by 2030 (McKinsey forecast, 2023). Laser cutting can more than double the wafers cut from each boule. In China, non-Chinese suppliers provided about 80 percent of SiC wafers and more than 95 percent of SiC devices, and local sourcing is expected to rise from about 15 percent to about 60 percent by 2030 (McKinsey forecast, 2023). (as of )Source: McKinsey on Semiconductors, No. 9, March 2024, pp. 50-54 (forecasts: McKinsey forecast, 2023) (opens in a new tab), ; may be out of date
Tungsten for interconnect & materialsSeverity: MediumSample
Tungsten used in chip interconnect and related manufacturing steps is subject to export-control exposure given its concentrated mining and refining base.
Countries
China

Memory

HBM DRAM supplySeverity: CriticalSample
High-bandwidth memory stacks are produced by three qualified suppliers; every AI accelerator with an HBM stack depends on this constrained supply base.
Countries
South Korea / United States / China
Companies exposed
SK hynixSamsung (not yet linked)Micron (not yet linked)

Packaging capacity

CoWoS advanced packaging capacitySeverity: CriticalSample
CoWoS interposer packaging capacity for HBM-equipped AI accelerators is concentrated at one foundry, gating shipped accelerator volume independent of die supply.
Countries
Taiwan
Companies exposed
TSMC

Packaging materials

ABF build-up film substratesSeverity: HighSample
Ajinomoto Build-up Film is the dominant dielectric material for high-layer-count package substrates used in AI accelerator packaging.
Countries
Japan
Companies exposed
TSMCIntel FoundrySamsung Foundry (not yet linked)

Work in progressEntries marked Sample or Unsourced, and company names marked not yet linked, are still being checked against public sources and the directory. Suggest a source or a correction

Severity bands

A labelled band, not a score. No index, grade or composite is published for a company, a country, a facility or a dependency.

Critical
One supplier or one country holds the capability and no qualified alternative is known.
High
Two or three suppliers hold the capability, and qualifying an alternative takes years.
Medium
Several suppliers exist but are concentrated in one region, or switching needs requalification.
Low
Qualified suppliers exist in more than one region and switching is routine.