Roles / Physical Design Block Lead

Physical Design Block Lead

PD-022v1

Physical Design & ImplementationImplementationIC5–IC7 / M1–M2IC or manager

Also known as: PD Block Owner; Block Implementation Lead; Backend Technical Lead

See this role on the AI-assisted flow lifecycle or on the SoC lifecycle or on the Soft IP lifecycle

Summary

Owns end-to-end delivery of one or more physical design blocks — technical decisions, schedule, quality, and the engineers executing them — and is accountable for the block meeting its PPA contract.

A day in the life

Work in progressNo day-in-the-life description has been written for this role yet. If you do this work, we would welcome yours. Suggest a source or a correction

Responsibilities

Lines tagged General are the Hub's general description of this kind of role, used where the role register has no entry yet. They are kept under review and will be refined.

Project

Work done for a product or program.

Negotiate and own the block PPA contract including frequency, area, power, and utilisation targets with SoC leadership.
Plan block implementation milestones, resource loading, and dependency handshakes with synthesis, DFT, and signoff teams.
Make the technical calls on floorplan strategy, hierarchy, clocking, and margin tradeoffs within the block.
Review implementation results from team members and direct iteration priorities when convergence stalls.
Escalate risk with quantified impact when RTL churn, IP delivery, or tool capacity threatens the block schedule.
Run block-level signoff readiness reviews across timing, power, physical verification, and reliability checks.
Coordinate ECO cycles and freeze discipline for the block during the tapeout window.
Mentor junior physical design engineers and grow block ownership capability within the team.
Drive post-mortems on block schedule and quality misses and feed improvements into methodology.
Represent the block in cross-functional integration forums and top-level convergence meetings.

Function

Work that keeps the discipline running: methods, tools, suppliers and people.

Maintain implementation flows, scripts and sign-off checklists.General
Work with EDA vendors and the CAD team to fix tool issues and improve results.General
Feed lessons from each tapeout back into flows and guidelines.General

Major tasks

Project

Produce and hand over the role's key deliverables
- Signed block PPA contract and implementation plan
- Block signoff readiness review package
- Released block database and abstract model set
- Risk register and escalation log for the block
- Block post-mortem and lessons-learned report
Implement the layoutGeneral
- Floorplan and plan the power grid
- Place, build the clock tree and route
- Run extraction and analysis
Close sign-offGeneral
- Close timing at every corner
- Clear DRC and LVS
- Complete the sign-off checklist

Function

Maintain the flowGeneral
- Update scripts and flow settings
- Qualify new tool versions
Share knowledgeGeneral
- Document fixes for recurring issues
- Train newer engineers on the flow

Works with

Implementation Managers
RTL Design Leads
STA and Signoff Engineers
DFT Leads
Program Management
IP Suppliers
Top-Level Integration

Typical backgrounds

BS/MS in Electrical Engineering; 8–15 years of physical implementation with multiple blocks delivered to tapeout.

Demand signal

0 open listings right now
0 Talent Wafer employer inquiries

Counts live listings tagged to this role, and employer interest in candidates from Talent Wafer runs for this role (all runs to date). Hub activity only, not the wider market.

Comp tier (within semis)

4 / 5

Remote feasibility

Medium

Semis core vs. portable

Core semiconductor-only

Geographic hotspots

Santa Clara, Austin, Bangalore, Hsinchu, Haifa, Seoul, Shanghai, Munich, Toronto

Certifications / standards training

—

Transfers to (industries)

Complex hardware technical programme leadership; engineering team leadership in electronics

Risk if vacant

Block decisions fragment across individual engineers, nobody holds the PPA contract, and integration surprises surface only at top-level assembly.

Physical Design Block Lead

Summary

A day in the life

Responsibilities

Project

Function

Major tasks

Project

Function

Works with

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