Foundation IP Engineer

Project

Work done for a product or program.

• Develop and maintain memory compilers that generate SRAM, register file and ROM instances across the full legal word/bit/mux configuration space.
• Characterise cells and memory instances across PVT corners to produce Liberty timing, power and noise models including CCS and ECSM variants.
• Design bitcell periphery circuits — sense amplifiers, write assist, read assist, timing replica paths — and validate margin across Vmin and yield targets.
• Integrate memory BIST and repair/redundancy schemes and validate them with the DFT and yield engineering teams.
• Silicon-qualify libraries and memories on SRAM test chips and characterisation vehicles, feeding measured Vmin and leakage back into models.
• Support implementation teams debugging cell-level timing, antenna, EM or DRC issues found during customer place-and-route.

Function

Work that keeps the discipline running: methods, tools, suppliers and people.

• Design and optimise standard cell topologies, drive strengths and multi-bit flip-flops for each new process node and threshold-voltage flavour.
• Run statistical Vmin, half-select and retention analysis and set the guard bands published in the memory datasheet.
• Validate library and compiler output views for consistency — GDS, LEF, Liberty, CDL, Verilog, ATPG models — via automated view-consistency checks.

Project

1. Produce and hand over the role's key deliverables
   • Released standard cell library with all EDA views and characterisation corners
   • Memory compiler binary with configuration rules and generated instance views
   • Liberty timing/power models with CCS/ECSM noise data
   • Memory and library datasheets with Vmin, retention and yield guard bands
   • Silicon characterisation correlation report per node
2. Design the blockGeneral
   • Write or capture the design to the specification
   • Run lint, simulation or circuit checks
   • Close design reviews and their actions
3. Support integration and sign-offGeneral
   • Fix bugs found by verification
   • Support timing and physical closure
   • Deliver handoff files and documentation

Function

1. Keep design methods currentGeneral
   • Maintain coding and design standards
   • Build and maintain reusable blocks
2. Develop peopleGeneral
   • Mentor newer engineers
   • Run design reviews and knowledge sharing sessions