Chip lifecycle / PDK lifecycle / PDK Planning & Scope

PDK Planning & Scope

Deciding what the design kit must contain and support: the devices and options it offers, the design styles it serves, the tool categories and flows it must run in, the foundation IP that comes with it, and the release plan with the maturity each release must reach.

Where this stage sits

This stage with its neighbours. Each row is a discipline active here, shaded by how mature its work is by the end of each stage.

Stage

^A01 PDK Planning & ScopeYou are here

^A02 Design Rules & Rule Manual

^D03 Device Modelling

Releases and customers milestones

SAPDK scope approval ARAlpha PDK release (early access)

Kit engineering milestones

PBPDK plan and tool support baselined MFTR1Device models fitted to silicon

PDK program and release management^A

Planned^A

v0.1

Process and silicon data^A

Reliability models and rules^O

v0.1

Design rules and rule manual^A

Planned

v0.1^AA

Physical verification decks^A

v0.1

Parasitic extraction and technology files^A

v0.1

Layout technology, PCells and symbols^A

v0.1

Standard cell and foundation IP libraries^D

Planned^O

v0.1

DFM rules and fill^A

v0.1

Kit quality assurance and regression^A

v0.1

EDA tool and reference flow enablement^O

Planned^O

v0.1

Customer support and errata^D

v0.1

Documentation, packaging and delivery^O

v0.1

KeyPlannedKit plannedv0.1Early access kitv0.5Design-start kitv0.9Pre-production kitv1.0Production kitControlledUnder change controlFaded block: Held, the status shown before it still standsFreeze or sign-off pointMilestone for one item; the rest of the work carries onMilestone gateTRTechnical readiness review (TR): a gate that checks the technology is ready before the next commitment.You are here: PDK Planning & ScopeAI impactDisruption (red)Augmentation (blue)Opportunity (green)How AI is changing the workWhat the steps mean What the codes mean

Show this chart as a list

Stages

Releases and customers milestones

Kit engineering milestones

PDK plan and tool support baselined (PB)
Device models fitted to silicon (MF) (technical readiness review TR1)

Disciplines

PDK program and release management^A
- PDK Planning & Scope: maturity Planned, Kit planned. Scope, charter, development plan and release maturity criteria approved.^A
- Design Rules & Rule Manual: maturity v0.1, Early access kit. Early access kit released with notes stating its limits, and the design-start release managed component by component.
- Device Modelling: maturity v0.1, Early access kit. Early access kit released with notes stating its limits, and the design-start release managed component by component.
Process and silicon data^A
- PDK Planning & Scope: maturity Planned, Kit planned. Technology definition, device targets and design rule intent handed to the kit team.
- Design Rules & Rule Manual: maturity v0.1, Early access kit. Test structures measured on early and baseline silicon for model fitting and rule checks.
- Device Modelling: maturity v0.1, Early access kit. Test structures measured on early and baseline silicon for model fitting and rule checks.^A
Device modelling^D
- PDK Planning & Scope: maturity Planned, Kit planned. Modelling approach and the model list planned with the scope.
- Design Rules & Rule Manual: maturity v0.1, Early access kit. Target models released in the early access kit, then models fitted to baseline silicon.
- Device Modelling: maturity v0.1, Early access kit. Target models released in the early access kit, then models fitted to baseline silicon.^D
Reliability models and rules^O
- Design Rules & Rule Manual: maturity v0.1, Early access kit. Ageing models developed from early stress data.
- Device Modelling: maturity v0.1, Early access kit. Ageing models developed from early stress data.^O
Design rules and rule manual^A
- PDK Planning & Scope: maturity Planned, Kit planned. Rule manual structure planned from the design rule intent.
- Design Rules & Rule Manual: maturity v0.1, Early access kit. Draft rule manual and test structure layouts released in the early access kit, then updated from silicon.^AA
- Device Modelling: maturity v0.1, Early access kit. Draft rule manual and test structure layouts released in the early access kit, then updated from silicon.
Physical verification decks^A
- Design Rules & Rule Manual: maturity v0.1, Early access kit. First decks in the early access kit, then deck coding and test cases validated on test layouts.
- Device Modelling: maturity v0.1, Early access kit. First decks in the early access kit, then deck coding and test cases validated on test layouts.
Parasitic extraction and technology files^A
- Design Rules & Rule Manual: maturity v0.1, Early access kit. Interconnect stack described and the first technology file released in the early access kit.
- Device Modelling: maturity v0.1, Early access kit. Interconnect stack described and the first technology file released in the early access kit.
Layout technology, PCells and symbols^A
- Design Rules & Rule Manual: maturity v0.1, Early access kit. Layer map, display files and symbols released in the early access kit, then parameterised cells developed.
- Device Modelling: maturity v0.1, Early access kit. Layer map, display files and symbols released in the early access kit, then parameterised cells developed.
Standard cell and foundation IP libraries^D
- PDK Planning & Scope: maturity Planned, Kit planned. Foundation IP plan agreed with the scope.^O
- Design Rules & Rule Manual: maturity v0.1, Early access kit. Cell, IO and memory compiler design started on the early access kit.
- Device Modelling: maturity v0.1, Early access kit. Cell, IO and memory compiler design started on the early access kit.
DFM rules and fill^A
- Device Modelling: maturity v0.1, Early access kit. Recommended rules drafted alongside the first decks.
Kit quality assurance and regression^A
- Design Rules & Rule Manual: maturity v0.1, Early access kit. Early access checks run and the QA test case library started.
- Device Modelling: maturity v0.1, Early access kit. Early access checks run and the QA test case library started.
EDA tool and reference flow enablement^O
- PDK Planning & Scope: maturity Planned, Kit planned. Tool support matrix agreed.^O
- Design Rules & Rule Manual: maturity v0.1, Early access kit. Decks and files ported to each supported tool category.
- Device Modelling: maturity v0.1, Early access kit. Decks and files ported to each supported tool category.
Customer support and errata^D
- Device Modelling: maturity v0.1, Early access kit. Early access users supported and their questions answered.
Documentation, packaging and delivery^O
- Design Rules & Rule Manual: maturity v0.1, Early access kit. Kit packaging and installation set up for the early access kit.
- Device Modelling: maturity v0.1, Early access kit. Kit packaging and installation set up for the early access kit.

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