Chip lifecycle / Checklists / FPGA lifecycle / System & FPGA Architecture: exit checklist

System & FPGA Architecture: exit checklist

Use before the architecture and pin-out freeze. Run by the system hardware architect.

1. Architecture

MustThe system architecture specification is final and reviewed.
Evidence
System architecture specification
Owner
System hardware architect
MustThe clocking and reset plan is reviewed, covering every clock source, domain and reset.
Evidence
Clocking and reset plan
Owner
FPGA design lead
SeeDecision: Clocking and reset strategy
MustThe processor architecture, hard or soft, is chosen.
Evidence
System architecture specification
Owner
System hardware architect
SeeDecision: Processor architecture
MustExternal memory and high-speed interfaces are chosen and fit the device resources.
Evidence
System architecture specification
Owner
System hardware architect
SeeDecision: External memory and high-speed interface choice
ShouldPartitioning and any partial reconfiguration are defined.
Evidence
System architecture specification
Owner
FPGA design lead
SeeDecision: Partitioning and partial reconfiguration

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