Checks the lab, boards, plans and people are ready to measure first silicon when it arrives. The analog characterisation engineer runs it.
MustThe tape-out or SoC hand-off gate was passed and its conditions are tracked.
MustFirst silicon has been received, with lot, wafer and split information recorded.
MustEvaluation boards are assembled and checked without parts before first power.
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The full lifecycle detail, with its charts, flows, tables and every section, is for registered members. Registration is free and takes a minute. You come back to this page afterwards.