Standard · Design & Architecture
Wishbone
An open, royalty-free on-chip bus specification with a simple synchronous handshake, widely used in open source hardware projects and academic SoC designs.
- Type
- Standard
- Domain
- Design & Architecture, Interconnect and fabric
Notes
Originated at Silicore and maintained through OpenCores; its openness predates the wider availability of AMBA specifications.
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Part of the Design & Architecture glossary, with every term in the topic and the lifecycles, tools and standards that use them.
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