Acronym · Fab Ops, Yield & Metrology
DOE (Design of Experiments)
A structured method for varying multiple process inputs across a planned matrix of runs so that main effects and interactions can be extracted with a minimum number of wafers.
- Also known as
- Designed experiment
- Type
- Acronym
- Domain
- Fab Ops, Yield & Metrology, Process control
Notes
Fractional factorial and response surface designs are the workhorses of process development in fabs.
Overview
DOE (design of experiments) is a statistical method for planning experiments so that several process inputs are changed together in a structured set of runs, and their individual effects and interactions can be separated from relatively few runs. In a fab it is the standard way to tune a deposition, etch or lithography step without testing one setting at a time. Common designs include full and fractional factorials, screening designs and response surface designs.
How it works
The team first sets an objective, then chooses the factors to vary, such as gas flow, pressure, power or temperature, and the responses to measure, such as etch rate, uniformity or a device parameter. Each factor gets a low and a high level, far enough apart to show an effect but not so wide that runs become impossible. When a response is a ratio, such as etch selectivity, it is better to measure both underlying rates. A design table lists the combinations to run.
A full factorial with k factors at two levels needs 2 to the power k runs, so six factors need 64. Fractional factorials run a carefully chosen half, quarter or smaller fraction, giving up some information about higher order interactions in exchange for far fewer wafers. Screening designs pick out the few factors that matter, and response surface designs then map the curvature near the best settings. The data are fitted with a model, usually linear or quadratic, that predicts each response from the factor settings.
DOE works best as a sequence of small experiments rather than one large one, and it depends on trustworthy measurements, so gauges should be checked first. Because each wafer run is costly, fabs also run virtual experiments on process models to narrow the options before committing silicon.
Examples
- A two-level fractional factorial on an etch step that varies power, pressure and gas ratio to balance etch rate against selectivity.
- A split lot that deliberately shifts implant dose and gate length to produce fast and slow corner wafers for checking device models.
- A response surface study that centres a chemical mechanical polishing step for the least dishing and erosion.
- A virtual DOE of hundreds of simulated runs on a process model to find a void-free tungsten fill before any wafers are processed.
Why it matters
Process engineers, integration engineers and yield engineers use DOE to develop new steps, centre processes within their windows, transfer recipes between tools and find the causes of yield loss. Done well, it reveals interactions between factors that one-at-a-time testing misses, and it saves wafers, tool time and cycle time.
Related terms
Part of the Fab Ops, Yield & Metrology glossary, with every term in the topic and the lifecycles, tools and standards that use them.
Where it appears on the Hub
Used on 21 pages of the Hub. In each group, the pages that mention it most come first.
Skills
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Last reviewed . Written by The Semiconductor Hub editorial team. The full glossary