Combining several chips in one package, side by side on an interposer (2.5D) or stacked on top of each other (3D), to get more bandwidth and function.
No statement on what tools can do has been recorded for this skill yet.
The Hub knows of no registered course, programme or certification for this skill yet.
Note from the research register: Advanced packaging courses, vendor design kits, papers and projects on chiplets and through-silicon vias.
Register version 1.