Roles / Workload Analysis Engineer

Workload Analysis Engineer

ARC-023v1

System & SoC ArchitectureArchitectureIC2–IC6Individual contributor

Also known as: Workload Characterization Engineer; Application Performance Analyst; Benchmark Engineer

See this role on the Startup lifecycle or on the SoC lifecycle or on the Soft IP lifecycle

Summary

Determines what the chip will actually be asked to do, by profiling real customer applications and reducing them into traces, kernels and benchmarks that architects can design against. Ensures architecture decisions are anchored in reality, not assumption.

A day in the life

Work in progressNo day-in-the-life description has been written for this role yet. If you do this work, we would welcome yours. Suggest a source or a correction

Responsibilities

Project

Work done for a product or program.

Profile production customer applications and open benchmarks to extract instruction mixes, cache behaviour and bandwidth profiles.
Build and curate the workload suite that the whole architecture organisation uses for projections and sign-off.
Reduce long-running applications into representative sampled traces using SimPoint or equivalent clustering methodology.
Characterise memory access patterns, working set sizes, branch behaviour and parallelism available in each workload.
Quantify which architectural features each workload actually exercises and flag features with no workload justification.
Correlate benchmark scores such as SPEC, MLPerf, Geekbench and customer KPIs with underlying microarchitectural events.
Maintain the workload-to-market-segment mapping so architects know which workloads represent which revenue.
Analyse competitor silicon behaviour on the same workload suite using PMU counters and published results.
Partner with customers under NDA to obtain representative traces without exposing proprietary code.

Function

Work that keeps the discipline running: methods, tools, suppliers and people.

Build automated analysis pipelines and dashboards that turn raw profiles into architectural insight.

Major tasks

Project

Produce and hand over the role's key deliverables
- Curated workload and benchmark suite with documentation
- Workload characterization reports per market segment
- Sampled trace library with representativeness validation
- Feature-to-workload justification matrix
- Competitive benchmark analysis with counter-level attribution
- Automated profiling pipeline and analysis dashboards
Define the architectureGeneral
- Collect and clarify the product requirements
- Build performance and power models
- Write and baseline the architecture specification
Support implementationGeneral
- Answer specification questions from design and verification
- Assess the impact of proposed changes
- Compare results with the original targets

Function

Build the architecture practiceGeneral
- Keep modelling tools and reference models current
- Publish design guidelines and specification templates
Plan aheadGeneral
- Study workload and technology trends
- Contribute to the product roadmap

Works with

Performance modeling engineers
CPU/GPU/NPU architects
software and compiler teams
product management
competitive analysis
key customers under NDA
post-silicon performance validation

Typical backgrounds

BS/MS in Computer Science or Computer Engineering; 3–12 years in performance engineering, systems software or architecture analysis.

Demand signal

0 open listings right now
0 Talent Wafer employer inquiries

Counts live listings tagged to this role, and employer interest in candidates from Talent Wafer runs for this role (all runs to date). Hub activity only, not the wider market.

Comp tier (within semis)

2 / 5

Remote feasibility

High

Semis core vs. portable

Semis-primary, transfers

Geographic hotspots

Austin and Santa Clara USA; Bangalore and Noida India; Shanghai China; Cambridge UK; Haifa Israel; Krakow Poland; Hsinchu Taiwan

Certifications / standards training

—

Transfers to (industries)

Cloud performance engineering, software performance consultancies, HPC centres, database and systems software vendors

Risk if vacant

Architects optimise for benchmarks rather than customer workloads, silicon features go unused, and the chip wins synthetic scores while losing real design-in decisions.

Workload Analysis Engineer

Summary

A day in the life

Responsibilities

Project

Function

Major tasks

Project

Function

Works with

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