PCIe Controller Digital Design Engineer

Project

Work done for a product or program.

• Implement transaction, data-link and MAC-layer logic for PCIe root complex and endpoint.
• Design LTSSM, equalization control and lane-reversal behaviour.
• Add SR-IOV, ATS, AER and power-management features to the controller.
• Interface the controller to the PHY through PIPE and to the SoC fabric.
• Close timing for multi-GHz controller clocks.
• Track PCI-SIG specification updates and plan generational upgrades.

Function

Work that keeps the discipline running: methods, tools, suppliers and people.

• Debug link training and compliance failures with validation teams.

Project

1. Produce and hand over the role's key deliverables
   • PCIe controller RTL
   • Design and integration specifications
   • Compliance test results
   • Link training debug reports
2. Support programsGeneral
   • Agree what each program needs
   • Deliver in time for milestones
3. Manage issuesGeneral
   • Track requests to closure
   • Escalate risks

Function

1. Run the functionGeneral
   • Maintain policies and processes
   • Keep records and controls
2. ImproveGeneral
   • Report performance
   • Lead improvement work