Memory Controller Architect

Project

Work done for a product or program.

• Define controller scheduling, reordering and bank-management algorithms.
• Model controller efficiency against realistic traffic patterns.
• Track JEDEC specification updates and plan feature adoption.
• Support validation on silicon with test memory vendors.

Function

Work that keeps the discipline running: methods, tools, suppliers and people.

• Specify refresh, power-down and self-refresh policies.
• Define protocol-level features such as RAS, ECC, rowhammer mitigation and training support.
• Work with PHY teams on timing training and calibration architecture.

Project

1. Produce and hand over the role's key deliverables
   • Controller architecture specification
   • Scheduling efficiency study
   • JEDEC compliance matrix
   • Controller programming guide
2. Support programsGeneral
   • Agree what each program needs
   • Deliver in time for milestones
3. Manage issuesGeneral
   • Track requests to closure
   • Escalate risks

Function

1. Run the functionGeneral
   • Maintain policies and processes
   • Keep records and controls
2. ImproveGeneral
   • Report performance
   • Lead improvement work