High-Speed Interface Controller Design Engineer

Project

Work done for a product or program.

• Implement PIPE, DFI, D-PHY/C-PHY or equivalent interfaces to the analog SerDes or PHY, including clock domain and rate-change handling.
• Design flow control, credit management, retry buffers, ordering rules and error recovery per the protocol specification.
• Implement lane reversal, polarity inversion, lane degradation and link retraining behaviour for robustness in real systems.
• Design power management state machines for L0s/L1/L2, ASPM, LPM or protocol equivalents and validate exit latency budgets.
• Implement automotive-grade variants including ASA-ML and MIPI A-PHY requirements where functional safety and EMC constraints apply.
• Debug link training failures and data corruption in the lab alongside PHY and signal integrity engineers.
• Track specification errata and engineering change notices from PCI-SIG, USB-IF, MIPI Alliance or IEEE and assess RTL impact.

Function

Work that keeps the discipline running: methods, tools, suppliers and people.

• Implement protocol layer RTL for the transaction, data link and logical PHY layers of standards such as PCIe Gen5/Gen6, CXL 3.x, USB4 or 800G Ethernet.
• Design link training and status state machines (LTSSM or equivalent) and the negotiation of speed, width and equalisation settings.
• Run compliance and interoperability testing with standards test suites, gold suites and third-party partner devices.

Project

1. Produce and hand over the role's key deliverables
   • Protocol controller RTL with full layer stack implementation
   • Link training state machine specification and coverage closure
   • PHY interface integration guide and timing requirements
   • Compliance and interoperability test reports
   • Errata impact assessments against specification updates
   • Power state machine and exit-latency validation results
2. Design the blockGeneral
   • Write or capture the design to the specification
   • Run lint, simulation or circuit checks
   • Close design reviews and their actions
3. Support integration and sign-offGeneral
   • Fix bugs found by verification
   • Support timing and physical closure
   • Deliver handoff files and documentation

Function

1. Keep design methods currentGeneral
   • Maintain coding and design standards
   • Build and maintain reusable blocks
2. Develop peopleGeneral
   • Mentor newer engineers
   • Run design reviews and knowledge sharing sessions