Also known as: Defect Reduction Engineer; Yield Enhancement Engineer, Defects; Wafer Inspection Engineer
See this role on the SoC lifecycle
Detects, classifies and drives down killer defects through inspection strategy, review and cross-module root cause work.
Work in progressNo day-in-the-life description has been written for this role yet. If you do this work, we would welcome yours. Suggest a source or a correction
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