DDR PHY Digital Design Engineer

Project

Work done for a product or program.

• Design PHY digital logic for DFI interface, data path and timing control.
• Create calibration state machines for impedance and delay control.
• Coordinate with analog PHY designers on digital-analog interface timing.
• Close timing for high-frequency PHY clocks and phase-shifted paths.
• Debug eye-margin and training failures during bring-up.

Function

Work that keeps the discipline running: methods, tools, suppliers and people.

• Implement training sequencers for write leveling, read gate and eye centreing.
• Support firmware teams that run training code on the PHY microcontroller.

Project

1. Produce and hand over the role's key deliverables
   • PHY digital RTL
   • DFI interface specification
   • Training and calibration logic documentation
   • Bring-up debug reports
2. Support programsGeneral
   • Agree what each program needs
   • Deliver in time for milestones
3. Manage issuesGeneral
   • Track requests to closure
   • Escalate risks

Function

1. Run the functionGeneral
   • Maintain policies and processes
   • Keep records and controls
2. ImproveGeneral
   • Report performance
   • Lead improvement work