The document that defines the base array: the configurable cell and how the custom layers turn it into logic and registers, the fixed and custom routing, the clock and power networks, the fixed blocks, the input and output ring and the array sizes.
Specification Work product in the Structured ASIC lifecycle
Every customer design is built from what this specification fixes, so it is the main reference for the library, the physical design, the verification and the design kit. If it is vague, the base layers may be taped out with choices that limit every later customer design.
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