1. Purpose of the gate
The first parts have been tested against the customer device specification across voltage and temperature, with any differences listed.
Samples validated is the vendor's own judgement of the device, made independently of the customer's system tests. It checks that specified functions and timing were tested on real parts across the voltage and temperature range in the device specification, and that every exception is listed with its effect and any workaround.
The device is validated on a base that has already been validated on test designs, so the work concentrates on what is specific to this design: its functions, its timing paths within the custom layers, its use of the fixed memories, clock generators and input and output cells, and its test logic. A difference that looks like a base issue is checked against the base validation results and, if confirmed, raised with the platform team because it may affect other customers.
For a converted design, the review checks the comparison with the FPGA prototype. Each item on the list of behaviour that relied on the FPGA, such as start-up state, memory initial contents or power-on reset, is checked on silicon and its result recorded. Timing differences at input and output pins are reviewed, because the customer's board was designed around the FPGA's timing.
The review also gathers what the production test program needs: the data to set test limits and the coverage achieved by the test patterns on real parts.
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