1. Purpose of the gate
The masks for the fixed base layers are released to manufacture and accepted, with the technology the base depends on confirmed ready.
This is the platform's largest single manufacturing commitment. The base layers carry most of the mask set and most processing steps, and wafers built from them will be shared by every customer device of that array size. An error in them is shared too, and is found only when customer layers are added and parts are tested.
As TR2, the review asks whether the technology the base depends on is ready, not only whether the design is clean. It checks the process design kit version the base was signed off on against the foundry's current version, the silicon status of every fixed block, and any open technology risks from TR1, before the masks are committed.
The usual checks still apply: timing, power integrity and physical checks are clean or waived with the foundry, the tape-out checklist is complete for each array size, and waivers have been reviewed formally with architecture and the foundry.
The review also confirms that the wafer banking arrangement is ready, because the first wafers will start as soon as masks are accepted.
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