1. Purpose and scope
This stage decides how the block will be built before its design code is written. The specification says what the block does and how it connects; the micro-architecture says how it does it: the partitioning into units, the data paths with their buffering and pipelining, the control and arbitration logic, the clocking and reset structure inside the block, the logic that implements each configuration option, and the full register map. The result is the IP micro-architecture specification, which the RTL to Early Access stage codes against.
The stage opens at the IP specification freeze and closes at the micro-architecture review, which places the block's work at the Pre-alpha step of the IP maturity scale: a first outline of the design, the verification plan and the test plan exists and has had a first review, but nothing is yet ready for integration trials.
Verification, test and performance work run alongside the design here, not after it. The verification plan is completed and approved at the same review, the test plan is drafted from the agreed test structures, and the performance discipline tracks the chosen structure against the targets on a model. Settling all three together lets coding, testbench development and test planning start from one agreed baseline.
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