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Designing the RF and millimetre-wave circuits, such as low-noise amplifiers, mixers, power amplifiers, switches, oscillators and synthesisers, phase shifters and filters, together with the electromagnetic models of their inductors, transformers, baluns, transmission lines and couplers, so that the passive structures the circuits rely on are simulated as they will be built rather than as ideal components.
Where this stage sits
This stage with its neighbours. Each row is a discipline active here, shaded by how mature its work is by the end of each stage.
Key0.0Specified0.3Sketched0.5Simulated0.8Feature complete1.0CompleteFreezeFrozenFaded block: still at the step shown before it, Held below Complete or Maintained under change control once complete or frozenFreeze or sign-off pointMilestone for one item; the rest of the work carries onMilestone gateTRTechnical readiness review (TR): a gate that checks the technology is ready before the next commitment.You are here: Circuit & Electromagnetic Co-designAI impactDDisruption (red)AAugmentation (blue)OOpportunity (green)How AI is changing the workWhat the steps meanWhat the codes mean
Technology Choice: maturity 0.5, Simulated. Product plan agreed and development committed: cost, schedule, bands and certification scope are set.
Circuit & Electromagnetic Co-design: maturity 0.5, Simulated. Product plan agreed and development committed: cost, schedule, bands and certification scope are set.
Layout & EM Extraction: maturity 0.5, Simulated. Product plan agreed and development committed: cost, schedule, bands and certification scope are set.
Technology Choice: maturity 0.5, Simulated. Link budget rechecked on the selected technology's device models and frozen there, with block specifications final.; Architecture and link budget frozen (milestone for one item)
Circuit & Electromagnetic Co-design: maturity 0.8, Feature complete. System simulation with the circuit results closes the budget across corners before layout.
Layout & EM Extraction: maturity 1.0, Complete. Budget closed on post-layout results: each block's extracted gain, noise, linearity and loss fits with margin.
Technology Choice: maturity 0.5, Simulated. Technology selected, design kit version identified and device models checked at the product's frequencies and powers.A
Circuit & Electromagnetic Co-design: maturity 0.8, Feature complete. Device models validated at frequency and the kit version recorded for design; correlation with silicon is still to come.A
Layout & EM Extraction: maturity 0.8, Feature complete. Device models validated at frequency and the kit version recorded for design; correlation with silicon is still to come.
Technology Choice: maturity 0.5, Simulated. Topologies simulate at nominal conditions on the selected technology's device models.
Circuit & Electromagnetic Co-design: maturity 0.8, Feature complete. Schematics complete and meeting block specifications across corners with electromagnetic models of the passives; post-layout closure is next.D
Layout & EM Extraction: maturity 1.0, Complete. Post-layout performance meets the specification across corners on the extracted layout with its electromagnetic models.
Technology Choice: maturity 0.5, Simulated. Substrate and metal stack set up from the selected kit, with first electromagnetic models of the key passives.
Circuit & Electromagnetic Co-design: maturity 0.8, Feature complete. Electromagnetic models of every critical passive validated and used in circuit simulation; layout extraction is next.A
Layout & EM Extraction: maturity 1.0, Complete. Full electromagnetic extraction of the layout complete, with coupling and isolation within budget; package models and silicon correlation build on it.A
Technology Choice: maturity 0.5, Simulated. Floorplan drawn on the selected technology, with passive footprints and RF paths placed.
Circuit & Electromagnetic Co-design: maturity 0.8, Feature complete. Floorplan and layout plan final, with the critical RF structures drawn for electromagnetic simulation.
Layout & EM Extraction: maturity 1.0, Complete. Layout complete and clean in physical verification, and the database assembled for sign-off.D
Technology Choice: maturity 0.5, Simulated. Verification plan drafted and test benches with modulated signals running on the first circuits.
Circuit & Electromagnetic Co-design: maturity 0.8, Feature complete. Plan final, with block and top-level simulations, including the control paths, running on the complete schematics; post-layout results are next.A
Layout & EM Extraction: maturity 1.0, Complete. Post-layout regression passes against the specification and the verification report is final.A
Technology Choice: maturity 0.5, Simulated. Control and calibration specification drafted, with the calibration loops simulated at system level.
Circuit & Electromagnetic Co-design: maturity 0.8, Feature complete. Control interface map and calibration specification final with the schematics; the algorithms wait for silicon.
Layout & EM Extraction: maturity 0.8, Feature complete. Control interface map and calibration specification final with the schematics; the algorithms wait for silicon.
Technology Choice: maturity 0.3, Sketched. Module and package concept chosen for the selected technology.
Circuit & Electromagnetic Co-design: maturity 0.5, Simulated. Substrate, die to package to board transitions and antenna designed and simulated at first pass.
Layout & EM Extraction: maturity 0.5, Simulated. Substrate, die to package to board transitions and antenna designed and simulated at first pass.
Technology Choice: maturity 0.0, Specified. Bench capability for the bands, powers and modulation checked, with equipment gaps, their lead times and the de-embedding approach agreed; no measurement plan yet.
Circuit & Electromagnetic Co-design: maturity 0.3, Sketched. Measurement needs and the de-embedding structures the layout must carry listed from the specification.
Layout & EM Extraction: maturity 0.5, Simulated. Measurement plan drafted, de-embedding structures in the layout and evaluation boards and fixtures designed.
Circuit & Electromagnetic Co-design: maturity 0.0, Specified. Production test cost target and tester class agreed from the band plan and volumes, with the test owner named; the test approach is outlined with the layout.
Layout & EM Extraction: maturity 0.3, Sketched. Test access and the RF test approach outlined with the layout.
Layout & EM Extraction: maturity 0.3, Sketched. RF stresses chosen, such as mismatch ruggedness and high-power life tests, and reliability checks run on the layout.
Technology Choice: maturity 0.5, Simulated. Program plan agreed and the risk register opened; schedule and risks are tracked through design.
Circuit & Electromagnetic Co-design: maturity 0.5, Simulated. Program plan agreed and the risk register opened; schedule and risks are tracked through design.
Layout & EM Extraction: maturity 0.5, Simulated. Program plan agreed and the risk register opened; schedule and risks are tracked through design.
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