Chip lifecycle / Checklists / SoC lifecycle / SoC RTL Design: stage entry checklist

SoC RTL Design: stage entry checklist

The design lead runs this as full-chip design coding starts.

1. Baseline

MustThe specification is frozen and the micro-architecture of each in-house block is reviewed.
Evidence
Micro-architecture specification
Owner
SoC architect
MustIntegrated IP is available, at least as early releases, to build the top level around.
Evidence
Integrated RTL
Owner
IP integration engineer
MustThe team knows that specification changes go through change control and are logged.
Owner
Design lead
SeeFlow: Requirements and specification change after freeze

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