1. Purpose of the gate
Analog and mixed-signal circuits depend on the process more directly than digital logic does. Noise, matching, leakage, gain, linearity and breakdown all come from the devices themselves, and the circuit can only be as good as the models that describe them. Before the specification is frozen and the circuit team commits to a topology and a performance budget, this review asks whether the process and devices chosen can really carry those targets, and whether the team knows enough about them to design with confidence.
Four criteria apply. Device models: the models for the devices the critical circuits use are accurate enough, and cover the corners, mismatch and temperature range the performance targets need. Critical circuit feasibility: the riskiest circuits, such as a reference, a converter front end, an oscillator or a high voltage stage, are shown feasible by early simulation on the target process. Silicon data for critical devices: measured data from test structures or earlier silicon supports the models where it matters most, or a plan to obtain it is agreed. Open process and device risks are tracked, each with an owner.
The review sits before the AMS specification freeze because the freeze locks the process node and foundry selection, the device options and metal stack, the design kit version and the circuit topology. Each of those choices rests on device evidence. If a model later proves optimistic, the topology may no longer meet its targets with the reserve the budget assumed, and the circuit must be redesigned. Finding a weak model here costs a study; finding it at silicon characterisation costs a respin.
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