Delayed, as of 05:30 UTC. Source: delayed quotes from a public quote service, refreshed at most every two minutes. Prices in each listing's own currency. Market data, not investment advice.
San Jose, United States · Listed on the Hub · Posted by the company · Listed until
As an Astera Labs Principal Physical Design Engineer (STA) you will play a crucial role in driving the planning, coordination, and execution supporting the design of Astera Labs' portfolio of connectivity ASICs used in the world's leading cloud service providers, server and network OEMs. This role requires end-to-end STA ownership across design stages, deep technical expertise, and close collaboration with RTL, physical design, and verification teams to ensure robust full-chip timing convergence. This role is fully on-site and in-person.
The full job description and the way to apply are for registered members. Registration is free and takes a minute. You come back to this page afterwards.