ISA (Instruction Set Architecture)

Notes

The commercial fight between x86, Arm and RISC-V is about licensing and ecosystems more than instruction encoding.

Overview

An instruction set architecture (ISA) is the contract between a processor's hardware and the software that runs on it: the instructions, registers, memory model and exception behaviour that software can rely on. Any processor that implements the same ISA can run the same compiled programs, however different its internal design, which is why the software ecosystem follows the ISA.

How it works

An ISA specifies what each instruction does, how instructions are encoded in binary, which registers exist, how memory is addressed and ordered, what happens on interrupts and exceptions, and which privilege levels exist for operating systems and hypervisors. It deliberately says nothing about pipelines, caches or clock speed; those belong to the microarchitecture.

Well-known ISAs include x86, used in most PCs and servers; Arm, which comes in an A-profile for rich applications, an R-profile for real-time and an M-profile for microcontrollers; and RISC-V, an open ISA whose base and ratified extensions are royalty free. ISAs grow through extensions, such as vector, cryptography or matrix instructions, while keeping old programs working.

The business model follows the ISA. Arm licenses its architecture and cores; RISC-V International publishes its specifications openly so that anyone can implement them; x86 is controlled by its owners. Compilers, operating systems, libraries and debuggers must all support an ISA before it is useful, which is why the ecosystem matters as much as the instructions.

Examples

• A laptop processor running x86 software that was compiled years earlier for a different chip.
• A smartphone SoC built on Arm A-profile cores alongside an Arm M-profile microcontroller for housekeeping.
• A RISC-V core with custom instructions added for a specific signal processing task.
• A vector extension added to an ISA so that compilers can speed up machine learning code.

Why it matters

Choosing an ISA fixes which software, tools and talent a product can use, and often licensing costs too. Instruction set architects, CPU microarchitects, compiler engineers and verification teams work directly with it, and SoC architects treat it as a strategic choice. Because binary compatibility is so valuable, ISA decisions last for decades.

In the chip lifecycle the ISA is chosen at concept or architecture, verified exhaustively in processor design, and then supported for the life of the product and its software.

It matters most to: Compiler Toolchain Engineer (CPU and DSP), CPU Microarchitect, Instruction Set Architect, Processor Verification Engineer

Common confusions

Not the same as microarchitecture

The ISA says what the processor does as seen by software. The microarchitecture is how one design does it internally; two microarchitectures of the same ISA can differ greatly in speed and power. ISA vs microarchitecture

Not the same as a processor core

A core is one implementation. Many different cores, from different companies, can implement the same ISA.

Sources

1. Arm CPU Architecture (opens in a new tab), Arm, 2026-10-22
2. About RISC-V (opens in a new tab), RISC-V International, 2026-10-22
3. Ratified Specifications (opens in a new tab), RISC-V International, 2026-10-22
4. RISC-V (Knowledge Center) (opens in a new tab), Semiconductor Engineering, 2026-10-22
5. Instruction set architecture (Wikipedia) (opens in a new tab), Wikimedia Foundation, 2026-10-22

Related terms

• RISC-V
• CPU
• Vector extension
• Core
• Microarchitecture
• RISC

Where it appears on the Hub

Used on 47 pages of the Hub. In each group, the pages that mention it most come first.