Charged Device Model

Notes

Because CDM current rises far faster than clamps can turn on, it drives layout rules on pad to clamp resistance and interface signal routing.

Overview

The charged device model (CDM) is the ESD test model for a component that has picked up static charge itself and then discharges through one of its pins when that pin touches a conductor at a lower potential. It represents the damage seen in automated handling, where parts slide along feeders and are picked and placed by machines. CDM sits alongside the human body model, which covers discharge from a charged person into the part.

How it works

In a CDM event the charge sits on the device itself, so the discharge path is very short and the pulse is extremely fast. The ESD Association describes durations often under one nanosecond, with peak currents that can reach tens of amperes, enough to break down thin gate oxides. Larger packages store more charge and see higher peak currents at the same test condition.

The test method is the joint ANSI/ESDA/JEDEC JS-002 standard, which replaced the separate JEDEC and ESDA methods. The part sits leads up on a field plate, is charged through the plate, and each pin is discharged in turn through a grounded probe, at both polarities. JS-002 calls for a high-bandwidth oscilloscope for the main waveform checks, because slower instruments miss the true first peak.

Results are grouped into classes, from C0A (below 125 V) to C3 (1000 V or more), and JEDEC JEP157 gives guidance on safe target levels. Designers meet the target with on-chip protection that steers the fast current around sensitive circuits. Very high-speed I/O, which tolerates little protective capacitance, is where the target is hardest to reach.

Examples

• A new SoC tested to JS-002, with every pin discharged at both polarities, and assigned a CDM class for its qualification report.
• A high-speed SerDes pin that passes at a lower CDM level than the rest of the chip because its protection had to stay small.
• A large package that reaches a higher peak discharge current than a small one at the same test condition.
• A device classed C0B, telling customers their handling lines may need tighter charge control than a basic ESD programme provides.

Why it matters

ESD designers, ESD qualification engineers and reliability teams work with CDM most directly. A part's CDM class tells every factory that handles it how strict its ESD controls must be, and because faster I/O and larger packages both make CDM robustness harder, the target is often agreed between design, quality and key customers.

Related terms

• ESD
• Human Body Model
• Machine Model
• Curve trace

Where it appears on the Hub

Used on 6 pages of the Hub. In each group, the pages that mention it most come first.