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Tier 3: niche / regionalVendor / User GroupIP & Interfaces
Organizer
Andes Technology
Cadence
Multiple per year
Usual host
Rotating, Rotating
Venue
—
Format
In-person
Scale
<500
Audience
Andes RISC-V processor IP licensees and ecosystem partners
Notes
Andes Technology's RISC-V processor IP conference series held across Taiwan, the US and Japan.
From The Semiconductor Hub's Global Semiconductor Events Directory: a research seed, not yet editorially verified row by row. Spotted an error?Let us know.