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International Symposium on VLSI Design, Automation and Test
(VLSI-DAT)
Tier 2: established / regionalTechnical ConferenceCircuits & SoC Design
Usual timing
Normally held in April. No confirmed next-edition date yet.
Organizer
Industrial Technology Research Institute (ITRI) / IEEE
Cadence
Annual
Usual host
Hsinchu, Taiwan
Venue
—
Format
In-person
Scale
<500
Audience
VLSI design, EDA and test researchers from Taiwan and Asia
Notes
Design/automation/test half of Taiwan's annual VLSI symposium week, co-located with VLSI-TSA in Hsinchu.
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