Events / Global directory / Design and Verification Conference and Exhibition United States

Design and Verification Conference and Exhibition United States

(DVCon U.S.)

Tier 1: global flagshipTechnical ConferenceEDA & Verification

Next known edition

2027-03-01 → 2027-03-04

1-4 Mar 2027, Hyatt Regency Santa Clara

Confirmed: Verified against the official source at compile time.

Organizer: Accellera Systems Initiative
Cadence: Annual
Usual host: Santa Clara, California, United States
Venue: Hyatt Regency Santa Clara
Format: In-person
Scale: 500-2,000
Audience: Verification engineers, methodology and standards practitioners
Website: dvcon.org/

Notes

The premier practitioner conference on design and verification languages, methodologies and standards such as UVM and SystemVerilog.

From The Semiconductor Hub's Global Semiconductor Events Directory: a research seed, not yet editorially verified row by row. Spotted an error? Let us know.