Amazon
Trainium2
Illustrative sample data. No editor has checked this record against public sources yet. Figures marked Sample are placeholders, not verified data.
- Process node
- TSMC N5Sample
- Die size
- 750 mm²Sample
- Memory
- 96GB HBM3Sample
- Packaging
- COWOS-SSample
- TDP
- 500WSample
- Throughput
- 667 TFLOPsSample
- Release year
- 2024Sample
Estimated manufacturing cost
US$2,460Sample estimate, work in progress
Logic die: $1050.00 (43%)Memory: $900.00 (37%)Packaging: $320.00 (13%)Test: $190.00 (8%)
- Logic die: sample figure, no method note linked yet
- Memory: sample figure, no method note linked yet
- Packaging: sample figure, no method note linked yet
- Test: sample figure, no method note linked yet
Work in progressThe total is the sum of the layers shown; it stays a sample estimate until every layer names its cost method note. Suggest a source or a correction
Model your own assumptions in the chip cost calculator, or compare against other accelerators on the cost bridge chart and price/performance frontier.