Editor-reviewed checklists for the work that runs a chip project: stage gates, tapeout readiness, qualification and end of life. A company starts one as a private checklist in its workspace, assigns the items and tracks them to completion.
These templates are working guidance for your own process. Completing one does not certify a product or show that a standard has been met.
Obsolescence management checklist: PCN issuance through last-time-buy and customer migration support.
5 items, covering End of Life
A new-product-introduction checklist spanning spec through production ramp, with one gate per major lifecycle stage.
8 items, covering SoC Specification & Architecture, SoC RTL Design, Full-Chip Verification, Physical Design & Sign-off, Tape-out, Bring-up & Silicon Validation, Qualification & Reliability, Production Ramp & Yield
AEC-Q100 / JEDEC-style reliability qualification item list ahead of production release.
6 items, covering Qualification & Reliability
Pre-tapeout sign-off items: DRC and LVS clean, timing closure and handoff package completeness.
6 items, covering Physical Design & Sign-off, Tape-out
For the stages themselves, see the chip lifecycle and its lifecycle checklists. To find help with any of this work, search the company directory.